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drm/i915: Fix framestart_delay commens in VRR code

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Since I originally wrote these comments we decided to change our
definition of framestart_delay from 0-3 to 1-4. Adjust the comments
to match that new convention. The actual code was adjusted already.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211117183103.27418-3-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
This commit is contained in:
Ville Syrjälä 2021-11-17 20:31:03 +02:00
parent 0088d39b6a
commit 9cca74b51e
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/i915/display/intel_vrr.c
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@ -60,7 +60,7 @@ intel_vrr_check_modeset(struct intel_atomic_state *state)
* Between those two points the vblank exit starts (and hence registers get * Between those two points the vblank exit starts (and hence registers get
* latched) ASAP after a push is sent. * latched) ASAP after a push is sent.
* *
* framestart_delay is programmable 0-3. * framestart_delay is programmable 1-4.
*/ */
static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state)
{ {
@ -138,13 +138,13 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
i915->window2_delay; i915->window2_delay;
else else
/* /*
* FIXME: s/4/framestart_delay+1/ to get consistent * FIXME: s/4/framestart_delay/ to get consistent
* earliest/latest points for register latching regardless * earliest/latest points for register latching regardless
* of the framestart_delay used? * of the framestart_delay used?
* *
* FIXME: this really needs the extra scanline to provide consistent * FIXME: this really needs the extra scanline to provide consistent
* behaviour for all framestart_delay values. Otherwise with * behaviour for all framestart_delay values. Otherwise with
* framestart_delay==3 we will end up extending the min vblank by * framestart_delay==4 we will end up extending the min vblank by
* one extra line. * one extra line.
*/ */
crtc_state->vrr.pipeline_full = crtc_state->vrr.pipeline_full =