ARM: OMAP AM33xx: clockdomains: Add clockdomain data and respective operations
AM33XX PRCM module consists of various clockdomains, in all total we have 18 clockdomains available, with following controlling options, - SW Sleep: sw forced sleep transition - SW Wakeup: sw forced wakeup transition This patch adds all available clockdomain data, respective clockdomain operations for AM33XX family of device, and also integrates it into existing OMAP framework. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> CC: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: removed CLKDM_NO_AUTODEPS from clockdomain flags, removed unnecessary .clktrctrl_offs field; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Vaibhav Hiremath
Paul Walmsley
parent
3f0ea7645a
commit
9c80f3aa8b
@ -133,6 +133,8 @@ obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common)
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obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
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obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o
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obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o
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# Clock framework
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obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
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@ -195,6 +195,7 @@ int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
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extern void __init omap242x_clockdomains_init(void);
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extern void __init omap243x_clockdomains_init(void);
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extern void __init omap3xxx_clockdomains_init(void);
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extern void __init am33xx_clockdomains_init(void);
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extern void __init omap44xx_clockdomains_init(void);
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extern void _clkdm_add_autodeps(struct clockdomain *clkdm);
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extern void _clkdm_del_autodeps(struct clockdomain *clkdm);
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@ -202,6 +203,7 @@ extern void _clkdm_del_autodeps(struct clockdomain *clkdm);
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extern struct clkdm_ops omap2_clkdm_operations;
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extern struct clkdm_ops omap3_clkdm_operations;
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extern struct clkdm_ops omap4_clkdm_operations;
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extern struct clkdm_ops am33xx_clkdm_operations;
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extern struct clkdm_dep gfx_24xx_wkdeps[];
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extern struct clkdm_dep dsp_24xx_wkdeps[];
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74
arch/arm/mach-omap2/clockdomain33xx.c
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74
arch/arm/mach-omap2/clockdomain33xx.c
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@ -0,0 +1,74 @@
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/*
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* AM33XX clockdomain control
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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* Vaibhav Hiremath <hvaibhav@ti.com>
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*
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* Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include "clockdomain.h"
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#include "cm33xx.h"
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static int am33xx_clkdm_sleep(struct clockdomain *clkdm)
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{
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am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs);
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return 0;
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}
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static int am33xx_clkdm_wakeup(struct clockdomain *clkdm)
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{
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am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs);
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return 0;
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}
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static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm)
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{
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am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
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}
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static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm)
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{
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am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
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}
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static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm)
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{
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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return am33xx_clkdm_wakeup(clkdm);
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return 0;
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}
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static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
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{
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bool hwsup = false;
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hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
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if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
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am33xx_clkdm_sleep(clkdm);
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return 0;
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}
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struct clkdm_ops am33xx_clkdm_operations = {
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.clkdm_sleep = am33xx_clkdm_sleep,
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.clkdm_wakeup = am33xx_clkdm_wakeup,
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.clkdm_allow_idle = am33xx_clkdm_allow_idle,
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.clkdm_deny_idle = am33xx_clkdm_deny_idle,
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.clkdm_clk_enable = am33xx_clkdm_clk_enable,
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.clkdm_clk_disable = am33xx_clkdm_clk_disable,
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};
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196
arch/arm/mach-omap2/clockdomains33xx_data.c
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196
arch/arm/mach-omap2/clockdomains33xx_data.c
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@ -0,0 +1,196 @@
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/*
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* AM33XX Clock Domain data.
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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* Vaibhav Hiremath <hvaibhav@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "clockdomain.h"
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#include "cm.h"
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#include "cm33xx.h"
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#include "cm-regbits-33xx.h"
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static struct clockdomain l4ls_am33xx_clkdm = {
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.name = "l4ls_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3s_am33xx_clkdm = {
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.name = "l3s_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4fw_am33xx_clkdm = {
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.name = "l4fw_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3_am33xx_clkdm = {
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.name = "l3_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4hs_am33xx_clkdm = {
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.name = "l4hs_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain ocpwp_l3_am33xx_clkdm = {
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.name = "ocpwp_l3_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain pruss_ocp_am33xx_clkdm = {
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.name = "pruss_ocp_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain cpsw_125mhz_am33xx_clkdm = {
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.name = "cpsw_125mhz_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain lcdc_am33xx_clkdm = {
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.name = "lcdc_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain clk_24mhz_am33xx_clkdm = {
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.name = "clk_24mhz_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_wkup_am33xx_clkdm = {
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.name = "l4_wkup_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_WKUP_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3_aon_am33xx_clkdm = {
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.name = "l3_aon_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_wkup_aon_am33xx_clkdm = {
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.name = "l4_wkup_aon_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain mpu_am33xx_clkdm = {
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.name = "mpu_clkdm",
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.pwrdm = { .name = "mpu_pwrdm" },
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.cm_inst = AM33XX_CM_MPU_MOD,
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.clkdm_offs = AM33XX_CM_MPU_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_rtc_am33xx_clkdm = {
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.name = "l4_rtc_clkdm",
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.pwrdm = { .name = "rtc_pwrdm" },
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.cm_inst = AM33XX_CM_RTC_MOD,
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.clkdm_offs = AM33XX_CM_RTC_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain gfx_l3_am33xx_clkdm = {
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.name = "gfx_l3_clkdm",
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.pwrdm = { .name = "gfx_pwrdm" },
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.cm_inst = AM33XX_CM_GFX_MOD,
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.clkdm_offs = AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain gfx_l4ls_gfx_am33xx_clkdm = {
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.name = "gfx_l4ls_gfx_clkdm",
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.pwrdm = { .name = "gfx_pwrdm" },
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.cm_inst = AM33XX_CM_GFX_MOD,
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.clkdm_offs = AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_cefuse_am33xx_clkdm = {
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.name = "l4_cefuse_clkdm",
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.pwrdm = { .name = "cefuse_pwrdm" },
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.cm_inst = AM33XX_CM_CEFUSE_MOD,
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.clkdm_offs = AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain *clockdomains_am33xx[] __initdata = {
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&l4ls_am33xx_clkdm,
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&l3s_am33xx_clkdm,
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&l4fw_am33xx_clkdm,
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&l3_am33xx_clkdm,
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&l4hs_am33xx_clkdm,
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&ocpwp_l3_am33xx_clkdm,
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&pruss_ocp_am33xx_clkdm,
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&cpsw_125mhz_am33xx_clkdm,
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&lcdc_am33xx_clkdm,
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&clk_24mhz_am33xx_clkdm,
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&l4_wkup_am33xx_clkdm,
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&l3_aon_am33xx_clkdm,
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&l4_wkup_aon_am33xx_clkdm,
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&mpu_am33xx_clkdm,
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&l4_rtc_am33xx_clkdm,
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&gfx_l3_am33xx_clkdm,
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&gfx_l4ls_gfx_am33xx_clkdm,
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&l4_cefuse_am33xx_clkdm,
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NULL,
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};
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void __init am33xx_clockdomains_init(void)
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{
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clkdm_register_platform_funcs(&am33xx_clkdm_operations);
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clkdm_register_clkdms(clockdomains_am33xx);
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clkdm_complete_init();
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}
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@ -486,6 +486,7 @@ void __init am33xx_init_early(void)
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omap_common_init_early();
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am33xx_voltagedomains_init();
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am33xx_powerdomains_init();
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am33xx_clockdomains_init();
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}
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#endif
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