forked from Minki/linux
IXP4xx: move IXDP425 platform macros to the platform code.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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@ -44,7 +44,6 @@
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#include "platform.h"
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/* Platform specific details */
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#include "ixdp425.h"
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#include "avila.h"
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#include "coyote.h"
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#include "prpmc1100.h"
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@ -70,14 +70,6 @@
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#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
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/*
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* IXDP425 board IRQs
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*/
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#define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11
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#define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10
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#define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9
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#define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8
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/*
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* Gateworks Avila board IRQs
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*/
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@ -1,39 +0,0 @@
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/*
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* arch/arm/mach-ixp4xx/include/mach/ixdp425.h
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*
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* IXDP425 platform specific definitions
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <mach/hardware.h>"
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#endif
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#define IXDP425_SDA_PIN 7
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#define IXDP425_SCL_PIN 6
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/*
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* IXDP425 PCI IRQs
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*/
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#define IXDP425_PCI_MAX_DEV 4
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#define IXDP425_PCI_IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define IXDP425_PCI_INTA_PIN 11
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#define IXDP425_PCI_INTB_PIN 10
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#define IXDP425_PCI_INTC_PIN 9
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#define IXDP425_PCI_INTD_PIN 8
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/* NAND Flash pins */
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#define IXDP425_NAND_NCE_PIN 12
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#define IXDP425_NAND_CMD_BYTE 0x01
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#define IXDP425_NAND_ADDR_BYTE 0x02
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@ -1,5 +1,5 @@
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/*
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* arch/arm/mach-ixp4xx/ixdp425-pci.c
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* arch/arm/mach-ixp4xx/ixdp425-pci.c
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*
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* IXDP425 board-level PCI initialization
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*
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@ -19,12 +19,25 @@
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <asm/mach/pci.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#define IXDP425_PCI_MAX_DEV 4
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#define IXDP425_PCI_IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define IXDP425_PCI_INTA_PIN 11
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#define IXDP425_PCI_INTB_PIN 10
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#define IXDP425_PCI_INTC_PIN 9
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#define IXDP425_PCI_INTD_PIN 8
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#define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11
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#define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10
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#define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9
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#define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8
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void __init ixdp425_pci_preinit(void)
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{
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set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
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@ -1,7 +1,7 @@
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/*
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* arch/arm/mach-ixp4xx/ixdp425-setup.c
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*
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* IXDP425/IXCDP1100 board-setup
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* IXDP425/IXCDP1100 board-setup
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*
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* Copyright (C) 2003-2005 MontaVista Software, Inc.
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*
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@ -21,7 +21,6 @@
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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@ -31,6 +30,15 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#define IXDP425_SDA_PIN 7
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#define IXDP425_SCL_PIN 6
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/* NAND Flash pins */
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#define IXDP425_NAND_NCE_PIN 12
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#define IXDP425_NAND_CMD_BYTE 0x01
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#define IXDP425_NAND_ADDR_BYTE 0x02
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static struct flash_platform_data ixdp425_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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