3rd set of new device support features and cleanup for IIO in the 5.10 cycle.
A late set given it seems the 5.10 cycle is going to start a bit later
than expected and quite a bit came in. Includes some late breaking
fixes that can wait for the merge window.
New device support
* ad9467
- ad9434 support including dt bindings update
- ad9265 support including dt bindings update
Yaml conversion
* amlogic,meson-saradc
Core rework (heading towards multiple buffer support)
* refactor iio_device_register_eventset
* Null-ify IIO device's event_interface during unregister.
Features
* ad7291
- convert from platform_data to devicetree including bindings doc.
* core
- Add titles to a few IIO config symbols to allow simpler out of tree
building. It does little harm so why not enable it.
Fixes
* ad7292
- Fix missing of_node_put()
* at91-sama5d2
- Fix a crash due to missordering of dma enabling as a result of recent
IIO wide rework.
* gyro-adc
- Fix missing of_node_put()
* ltc2983
- Fix missing of_node_put()
* stm32-adc
- Fix an issue with runtime autosuspend related to parent autosuspending.
Cleanups
* counter/ti-eqep
- Tidy up a , instead of ;
* buffer-dmaengine
- Drop the unmanaged allocator functions as no one is using them.
* at91-sama5d2
- devm_platform_get_and_ioremap_resouce() replacing boilerplate.
* cros_ec
- move the hw fifo attributes setup into the cros_ec core.
* gp2ap002
- comment typo
* microchip-tcb-capture:
- consitifcation
* ssp
- Use PLATFORM_DEVID_NONE instead of -1 to convey true meaning.
* stm32-dfsdm
- devm_platform_get_and_ioremap_resouce() replacing boilerplate.
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Merge tag 'iio-for-5.10c' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
3rd set of new device support features and cleanup for IIO in the 5.10 cycle.
A late set given it seems the 5.10 cycle is going to start a bit later
than expected and quite a bit came in. Includes some late breaking
fixes that can wait for the merge window.
New device support
* ad9467
- ad9434 support including dt bindings update
- ad9265 support including dt bindings update
Yaml conversion
* amlogic,meson-saradc
Core rework (heading towards multiple buffer support)
* refactor iio_device_register_eventset
* Null-ify IIO device's event_interface during unregister.
Features
* ad7291
- convert from platform_data to devicetree including bindings doc.
* core
- Add titles to a few IIO config symbols to allow simpler out of tree
building. It does little harm so why not enable it.
Fixes
* ad7292
- Fix missing of_node_put()
* at91-sama5d2
- Fix a crash due to missordering of dma enabling as a result of recent
IIO wide rework.
* gyro-adc
- Fix missing of_node_put()
* ltc2983
- Fix missing of_node_put()
* stm32-adc
- Fix an issue with runtime autosuspend related to parent autosuspending.
Cleanups
* counter/ti-eqep
- Tidy up a , instead of ;
* buffer-dmaengine
- Drop the unmanaged allocator functions as no one is using them.
* at91-sama5d2
- devm_platform_get_and_ioremap_resouce() replacing boilerplate.
* cros_ec
- move the hw fifo attributes setup into the cros_ec core.
* gp2ap002
- comment typo
* microchip-tcb-capture:
- consitifcation
* ssp
- Use PLATFORM_DEVID_NONE instead of -1 to convey true meaning.
* stm32-dfsdm
- devm_platform_get_and_ioremap_resouce() replacing boilerplate.
* tag 'iio-for-5.10c' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (25 commits)
iio: adc: gyroadc: fix leak of device node iterator
iio: adc: stm32-adc: fix runtime autosuspend delay when slow polling
iio: adc: at91-sama5d2_adc: fix DMA conversion crash
iio: ad7292: Fix of_node refcounting
iio: ltc2983: Fix of_node refcounting
counter: use semicolons rather than commas to separate statements
iio: buffer: Kconfig: add title for IIO_TRIGGERED_BUFFER symbol
iio: Kconfig: Provide title for IIO_TRIGGERED_EVENT symbol
iio: dma-buffer: Kconfig: Provide titles for IIO DMA Kconfig symbols
iio: cros_ec: unify hw fifo attributes into the core file
dt-bindings: iio: ad9467: add entries for for AD9434 & AD9265 ADCs
iio: adc: ad9467: add support for AD9265 high-speed ADC
iio: adc: ad9467: add support for AD9434 high-speed ADC
iio: adc: ad9467: wrap a axi-adc chip-info into a ad9467_chip_info type
iio: buffer-dmaengine: remove non managed alloc/free
iio: adc: stm32-dfsdm: Use devm_platform_get_and_ioremap_resource()
iio: adc: at91-sama5d2_adc: Use devm_platform_get_and_ioremap_resource()
iio: ssp: use PLATFORM_DEVID_NONE
dt-bindings: iio: adc: ad7291: add binding
iio: adc: ad7291: convert to device tree
...
This commit is contained in:
Greg Kroah-Hartman
commit
9b1e57ef81
46
Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml
Normal file
46
Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml
Normal file
@ -0,0 +1,46 @@
|
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad7291.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
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|
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maintainers:
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- Michael Auchter <michael.auchter@ni.com>
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description: |
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Analog Devices AD7291 8-Channel I2C 12-Bit SAR ADC with Temperature Sensor
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https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf
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|
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properties:
|
||||
compatible:
|
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enum:
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- adi,ad7291
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reg:
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maxItems: 1
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vref-supply:
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description: |
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The regulator supply for ADC reference voltage.
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required:
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- compatible
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- reg
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additionalProperties: false
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||||
|
||||
examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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ad7291: adc@0 {
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compatible = "adi,ad7291";
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reg = <0>;
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vref-supply = <&adc_vref>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -4,21 +4,30 @@
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||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
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||||
|
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title: Analog Devices AD9467 High-Speed ADC
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title: Analog Devices AD9467 and similar High-Speed ADCs
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|
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maintainers:
|
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- Michael Hennerich <michael.hennerich@analog.com>
|
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- Alexandru Ardelean <alexandru.ardelean@analog.com>
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|
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description: |
|
||||
The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital
|
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converter (ADC).
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The AD9467 and the parts similar with it, are high-speed analog-to-digital
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converters (ADCs), operating in the range of 100 to 500 mega samples
|
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per second (MSPS). Some parts support higher MSPS and some
|
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lower MSPS, suitable for the intended application of each part.
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|
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All the parts support the register map described by Application Note AN-877
|
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https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
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|
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https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
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https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf
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properties:
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compatible:
|
||||
enum:
|
||||
- adi,ad9265
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- adi,ad9434
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- adi,ad9467
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|
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reg:
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||||
|
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@ -1,48 +0,0 @@
|
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* Amlogic Meson SAR (Successive Approximation Register) A/D converter
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|
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Required properties:
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- compatible: depending on the SoC this should be one of:
|
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- "amlogic,meson8-saradc" for Meson8
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- "amlogic,meson8b-saradc" for Meson8b
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- "amlogic,meson8m2-saradc" for Meson8m2
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- "amlogic,meson-gxbb-saradc" for GXBB
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- "amlogic,meson-gxl-saradc" for GXL
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- "amlogic,meson-gxm-saradc" for GXM
|
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- "amlogic,meson-axg-saradc" for AXG
|
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- "amlogic,meson-g12a-saradc" for AXG
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along with the generic "amlogic,meson-saradc"
|
||||
- reg: the physical base address and length of the registers
|
||||
- interrupts: the interrupt indicating end of sampling
|
||||
- clocks: phandle and clock identifier (see clock-names)
|
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- clock-names: mandatory clocks:
|
||||
- "clkin" for the reference clock (typically XTAL)
|
||||
- "core" for the SAR ADC core clock
|
||||
optional clocks:
|
||||
- "adc_clk" for the ADC (sampling) clock
|
||||
- "adc_sel" for the ADC (sampling) clock mux
|
||||
- vref-supply: the regulator supply for the ADC reference voltage
|
||||
- #io-channel-cells: must be 1, see ../iio-bindings.txt
|
||||
|
||||
Optional properties:
|
||||
- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit
|
||||
of the TSC (temperature sensor coefficient) on
|
||||
Meson8b and Meson8m2 (which used to calibrate the
|
||||
temperature sensor)
|
||||
- nvmem-cells: phandle to the temperature_calib eFuse cells
|
||||
- nvmem-cell-names: if present (to enable the temperature sensor
|
||||
calibration) this must contain "temperature_calib"
|
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|
||||
|
||||
Example:
|
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saradc: adc@8680 {
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compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
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#io-channel-cells = <1>;
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reg = <0x0 0x8680 0x0 0x34>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>,
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<&clkc CLKID_SAR_ADC>,
|
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<&clkc CLKID_SANA>,
|
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<&clkc CLKID_SAR_ADC_CLK>,
|
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<&clkc CLKID_SAR_ADC_SEL>;
|
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clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
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};
|
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@ -0,0 +1,149 @@
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||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic Meson SAR (Successive Approximation Register) A/D converter
|
||||
|
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maintainers:
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
description:
|
||||
Binding covers a range of ADCs found on Amlogic Meson SoCs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: amlogic,meson-saradc
|
||||
- items:
|
||||
- enum:
|
||||
- amlogic,meson8-saradc
|
||||
- amlogic,meson8b-saradc
|
||||
- amlogic,meson8m2-saradc
|
||||
- amlogic,meson-gxbb-saradc
|
||||
- amlogic,meson-gxl-saradc
|
||||
- amlogic,meson-gxm-saradc
|
||||
- amlogic,meson-axg-saradc
|
||||
- amlogic,meson-g12a-saradc
|
||||
- const: amlogic,meson-saradc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description: Interrupt indicates end of sampling.
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
maxItems: 4
|
||||
items:
|
||||
- const: clkin
|
||||
- const: core
|
||||
- const: adc_clk
|
||||
- const: adc_sel
|
||||
|
||||
vref-supply: true
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
amlogic,hhi-sysctrl:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Syscon which contains the 5th bit of the TSC (temperature sensor
|
||||
coefficient) on Meson8b and Meson8m2 (which used to calibrate the
|
||||
temperature sensor)
|
||||
|
||||
nvmem-cells:
|
||||
description: phandle to the temperature_calib eFuse cells
|
||||
maxItems: 1
|
||||
|
||||
nvmem-cell-names:
|
||||
const: temperature_calib
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- amlogic,meson8-saradc
|
||||
- amlogic,meson8b-saradc
|
||||
- amlogic,meson8m2-saradc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
maxItems: 2
|
||||
else:
|
||||
properties:
|
||||
nvmem-cells: false
|
||||
mvmem-cel-names: false
|
||||
clocks:
|
||||
minItems: 4
|
||||
clock-names:
|
||||
minItems: 4
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- amlogic,meson8b-saradc
|
||||
- amlogic,meson8m2-saradc
|
||||
then:
|
||||
properties:
|
||||
amlogic,hhi-sysctrl: true
|
||||
else:
|
||||
properties:
|
||||
amlogic,hhi-sysctrl: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#io-channel-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/gxbb-clkc.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
adc@8680 {
|
||||
compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0 0x8680 0x0 0x34>;
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&xtal>,
|
||||
<&clkc CLKID_SAR_ADC>,
|
||||
<&clkc CLKID_SAR_ADC_CLK>,
|
||||
<&clkc CLKID_SAR_ADC_SEL>;
|
||||
clock-names = "clkin", "core", "adc_clk", "adc_sel";
|
||||
};
|
||||
adc@9680 {
|
||||
compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0 0x9680 0x0 0x34>;
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
|
||||
clock-names = "clkin", "core";
|
||||
nvmem-cells = <&tsens_caldata>;
|
||||
nvmem-cell-names = "temperature_calib";
|
||||
amlogic,hhi-sysctrl = <&hhi>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -253,7 +253,7 @@ static struct counter_count mchp_tc_counts[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct counter_ops mchp_tc_ops = {
|
||||
static const struct counter_ops mchp_tc_ops = {
|
||||
.signal_read = mchp_tc_count_signal_read,
|
||||
.count_read = mchp_tc_count_read,
|
||||
.function_get = mchp_tc_count_function_get,
|
||||
|
||||
@ -439,7 +439,7 @@ static int ti_eqep_remove(struct platform_device *pdev)
|
||||
struct device *dev = &pdev->dev;
|
||||
|
||||
counter_unregister(&priv->counter);
|
||||
pm_runtime_put_sync(dev),
|
||||
pm_runtime_put_sync(dev);
|
||||
pm_runtime_disable(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -63,7 +63,7 @@ config IIO_SW_TRIGGER
|
||||
using the API provided.
|
||||
|
||||
config IIO_TRIGGERED_EVENT
|
||||
tristate
|
||||
tristate "Enable triggered events support"
|
||||
select IIO_TRIGGER
|
||||
help
|
||||
Provides helper functions for setting up triggered events.
|
||||
|
||||
@ -215,7 +215,7 @@ static int cros_ec_accel_legacy_probe(struct platform_device *pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
|
||||
cros_ec_sensors_capture, NULL);
|
||||
cros_ec_sensors_capture, NULL, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
||||
@ -20,8 +20,6 @@
|
||||
#include <linux/iio/sysfs.h>
|
||||
#include <linux/iio/events.h>
|
||||
|
||||
#include <linux/platform_data/ad7291.h>
|
||||
|
||||
/*
|
||||
* Simplified handling
|
||||
*
|
||||
@ -465,7 +463,6 @@ static const struct iio_info ad7291_info = {
|
||||
static int ad7291_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct ad7291_platform_data *pdata = client->dev.platform_data;
|
||||
struct ad7291_chip_info *chip;
|
||||
struct iio_dev *indio_dev;
|
||||
int ret;
|
||||
@ -475,16 +472,6 @@ static int ad7291_probe(struct i2c_client *client,
|
||||
return -ENOMEM;
|
||||
chip = iio_priv(indio_dev);
|
||||
|
||||
if (pdata && pdata->use_external_ref) {
|
||||
chip->reg = devm_regulator_get(&client->dev, "vref");
|
||||
if (IS_ERR(chip->reg))
|
||||
return PTR_ERR(chip->reg);
|
||||
|
||||
ret = regulator_enable(chip->reg);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
mutex_init(&chip->state_lock);
|
||||
/* this is only used for device removal purposes */
|
||||
i2c_set_clientdata(client, indio_dev);
|
||||
@ -495,8 +482,21 @@ static int ad7291_probe(struct i2c_client *client,
|
||||
AD7291_T_SENSE_MASK | /* Tsense always enabled */
|
||||
AD7291_ALERT_POLARITY; /* set irq polarity low level */
|
||||
|
||||
if (pdata && pdata->use_external_ref)
|
||||
chip->reg = devm_regulator_get_optional(&client->dev, "vref");
|
||||
if (IS_ERR(chip->reg)) {
|
||||
if (PTR_ERR(chip->reg) != -ENODEV)
|
||||
return PTR_ERR(chip->reg);
|
||||
|
||||
chip->reg = NULL;
|
||||
}
|
||||
|
||||
if (chip->reg) {
|
||||
ret = regulator_enable(chip->reg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
chip->command |= AD7291_EXT_REF;
|
||||
}
|
||||
|
||||
indio_dev->name = id->name;
|
||||
indio_dev->channels = ad7291_channels;
|
||||
@ -567,9 +567,16 @@ static const struct i2c_device_id ad7291_id[] = {
|
||||
|
||||
MODULE_DEVICE_TABLE(i2c, ad7291_id);
|
||||
|
||||
static const struct of_device_id ad7291_of_match[] = {
|
||||
{ .compatible = "adi,ad7291" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ad7291_of_match);
|
||||
|
||||
static struct i2c_driver ad7291_driver = {
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.of_match_table = ad7291_of_match,
|
||||
},
|
||||
.probe = ad7291_probe,
|
||||
.remove = ad7291_remove,
|
||||
|
||||
@ -310,8 +310,10 @@ static int ad7292_probe(struct spi_device *spi)
|
||||
|
||||
for_each_available_child_of_node(spi->dev.of_node, child) {
|
||||
diff_channels = of_property_read_bool(child, "diff-channels");
|
||||
if (diff_channels)
|
||||
if (diff_channels) {
|
||||
of_node_put(child);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (diff_channels) {
|
||||
|
||||
@ -76,6 +76,22 @@
|
||||
/* AN877_ADC_REG_OUTPUT_DELAY */
|
||||
#define AN877_ADC_DCO_DELAY_ENABLE 0x80
|
||||
|
||||
/*
|
||||
* Analog Devices AD9265 16-Bit, 125/105/80 MSPS ADC
|
||||
*/
|
||||
|
||||
#define CHIPID_AD9265 0x64
|
||||
#define AD9265_DEF_OUTPUT_MODE 0x40
|
||||
#define AD9265_REG_VREF_MASK 0xC0
|
||||
|
||||
/*
|
||||
* Analog Devices AD9434 12-Bit, 370/500 MSPS ADC
|
||||
*/
|
||||
|
||||
#define CHIPID_AD9434 0x6A
|
||||
#define AD9434_DEF_OUTPUT_MODE 0x00
|
||||
#define AD9434_REG_VREF_MASK 0xC0
|
||||
|
||||
/*
|
||||
* Analog Devices AD9467 16-Bit, 200/250 MSPS ADC
|
||||
*/
|
||||
@ -85,9 +101,20 @@
|
||||
#define AD9467_REG_VREF_MASK 0x0F
|
||||
|
||||
enum {
|
||||
ID_AD9265,
|
||||
ID_AD9434,
|
||||
ID_AD9467,
|
||||
};
|
||||
|
||||
struct ad9467_chip_info {
|
||||
struct adi_axi_adc_chip_info axi_adc_info;
|
||||
unsigned int default_output_mode;
|
||||
unsigned int vref_mask;
|
||||
};
|
||||
|
||||
#define to_ad9467_chip_info(_info) \
|
||||
container_of(_info, struct ad9467_chip_info, axi_adc_info)
|
||||
|
||||
struct ad9467_state {
|
||||
struct spi_device *spi;
|
||||
struct clk *clk;
|
||||
@ -149,6 +176,17 @@ static int ad9467_reg_access(struct adi_axi_adc_conv *conv, unsigned int reg,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const unsigned int ad9265_scale_table[][2] = {
|
||||
{1250, 0x00}, {1500, 0x40}, {1750, 0x80}, {2000, 0xC0},
|
||||
};
|
||||
|
||||
static const unsigned int ad9434_scale_table[][2] = {
|
||||
{1600, 0x1C}, {1580, 0x1D}, {1550, 0x1E}, {1520, 0x1F}, {1500, 0x00},
|
||||
{1470, 0x01}, {1440, 0x02}, {1420, 0x03}, {1390, 0x04}, {1360, 0x05},
|
||||
{1340, 0x06}, {1310, 0x07}, {1280, 0x08}, {1260, 0x09}, {1230, 0x0A},
|
||||
{1200, 0x0B}, {1180, 0x0C},
|
||||
};
|
||||
|
||||
static const unsigned int ad9467_scale_table[][2] = {
|
||||
{2000, 0}, {2100, 6}, {2200, 7},
|
||||
{2300, 8}, {2400, 9}, {2500, 10},
|
||||
@ -182,39 +220,63 @@ static void __ad9467_get_scale(struct adi_axi_adc_conv *conv, int index,
|
||||
}, \
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec ad9434_channels[] = {
|
||||
AD9467_CHAN(0, 0, 12, 'S'),
|
||||
};
|
||||
|
||||
static const struct iio_chan_spec ad9467_channels[] = {
|
||||
AD9467_CHAN(0, 0, 16, 'S'),
|
||||
};
|
||||
|
||||
static const struct adi_axi_adc_chip_info ad9467_chip_tbl[] = {
|
||||
static const struct ad9467_chip_info ad9467_chip_tbl[] = {
|
||||
[ID_AD9265] = {
|
||||
.axi_adc_info = {
|
||||
.id = CHIPID_AD9265,
|
||||
.max_rate = 125000000UL,
|
||||
.scale_table = ad9265_scale_table,
|
||||
.num_scales = ARRAY_SIZE(ad9265_scale_table),
|
||||
.channels = ad9467_channels,
|
||||
.num_channels = ARRAY_SIZE(ad9467_channels),
|
||||
},
|
||||
.default_output_mode = AD9265_DEF_OUTPUT_MODE,
|
||||
.vref_mask = AD9265_REG_VREF_MASK,
|
||||
},
|
||||
[ID_AD9434] = {
|
||||
.axi_adc_info = {
|
||||
.id = CHIPID_AD9434,
|
||||
.max_rate = 500000000UL,
|
||||
.scale_table = ad9434_scale_table,
|
||||
.num_scales = ARRAY_SIZE(ad9434_scale_table),
|
||||
.channels = ad9434_channels,
|
||||
.num_channels = ARRAY_SIZE(ad9434_channels),
|
||||
},
|
||||
.default_output_mode = AD9434_DEF_OUTPUT_MODE,
|
||||
.vref_mask = AD9434_REG_VREF_MASK,
|
||||
},
|
||||
[ID_AD9467] = {
|
||||
.id = CHIPID_AD9467,
|
||||
.max_rate = 250000000UL,
|
||||
.scale_table = ad9467_scale_table,
|
||||
.num_scales = ARRAY_SIZE(ad9467_scale_table),
|
||||
.channels = ad9467_channels,
|
||||
.num_channels = ARRAY_SIZE(ad9467_channels),
|
||||
.axi_adc_info = {
|
||||
.id = CHIPID_AD9467,
|
||||
.max_rate = 250000000UL,
|
||||
.scale_table = ad9467_scale_table,
|
||||
.num_scales = ARRAY_SIZE(ad9467_scale_table),
|
||||
.channels = ad9467_channels,
|
||||
.num_channels = ARRAY_SIZE(ad9467_channels),
|
||||
},
|
||||
.default_output_mode = AD9467_DEF_OUTPUT_MODE,
|
||||
.vref_mask = AD9467_REG_VREF_MASK,
|
||||
},
|
||||
};
|
||||
|
||||
static int ad9467_get_scale(struct adi_axi_adc_conv *conv, int *val, int *val2)
|
||||
{
|
||||
const struct adi_axi_adc_chip_info *info = conv->chip_info;
|
||||
const struct ad9467_chip_info *info1 = to_ad9467_chip_info(info);
|
||||
struct ad9467_state *st = adi_axi_adc_conv_priv(conv);
|
||||
unsigned int i, vref_val, vref_mask;
|
||||
unsigned int i, vref_val;
|
||||
|
||||
vref_val = ad9467_spi_read(st->spi, AN877_ADC_REG_VREF);
|
||||
|
||||
switch (info->id) {
|
||||
case CHIPID_AD9467:
|
||||
vref_mask = AD9467_REG_VREF_MASK;
|
||||
break;
|
||||
default:
|
||||
vref_mask = 0xFFFF;
|
||||
break;
|
||||
}
|
||||
|
||||
vref_val &= vref_mask;
|
||||
vref_val &= info1->vref_mask;
|
||||
|
||||
for (i = 0; i < info->num_scales; i++) {
|
||||
if (vref_val == info->scale_table[i][1])
|
||||
@ -316,18 +378,6 @@ static int ad9467_preenable_setup(struct adi_axi_adc_conv *conv)
|
||||
return ad9467_outputmode_set(st->spi, st->output_mode);
|
||||
}
|
||||
|
||||
static int ad9467_setup(struct ad9467_state *st, unsigned int chip_id)
|
||||
{
|
||||
switch (chip_id) {
|
||||
case CHIPID_AD9467:
|
||||
st->output_mode = AD9467_DEF_OUTPUT_MODE |
|
||||
AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT;
|
||||
return 0;
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
static void ad9467_clk_disable(void *data)
|
||||
{
|
||||
struct ad9467_state *st = data;
|
||||
@ -337,7 +387,7 @@ static void ad9467_clk_disable(void *data)
|
||||
|
||||
static int ad9467_probe(struct spi_device *spi)
|
||||
{
|
||||
const struct adi_axi_adc_chip_info *info;
|
||||
const struct ad9467_chip_info *info;
|
||||
struct adi_axi_adc_conv *conv;
|
||||
struct ad9467_state *st;
|
||||
unsigned int id;
|
||||
@ -386,7 +436,7 @@ static int ad9467_probe(struct spi_device *spi)
|
||||
|
||||
spi_set_drvdata(spi, st);
|
||||
|
||||
conv->chip_info = info;
|
||||
conv->chip_info = &info->axi_adc_info;
|
||||
|
||||
id = ad9467_spi_read(spi, AN877_ADC_REG_CHIP_ID);
|
||||
if (id != conv->chip_info->id) {
|
||||
@ -400,10 +450,15 @@ static int ad9467_probe(struct spi_device *spi)
|
||||
conv->read_raw = ad9467_read_raw;
|
||||
conv->preenable_setup = ad9467_preenable_setup;
|
||||
|
||||
return ad9467_setup(st, id);
|
||||
st->output_mode = info->default_output_mode |
|
||||
AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id ad9467_of_match[] = {
|
||||
{ .compatible = "adi,ad9265", .data = &ad9467_chip_tbl[ID_AD9265], },
|
||||
{ .compatible = "adi,ad9434", .data = &ad9467_chip_tbl[ID_AD9434], },
|
||||
{ .compatible = "adi,ad9467", .data = &ad9467_chip_tbl[ID_AD9467], },
|
||||
{}
|
||||
};
|
||||
|
||||
@ -884,7 +884,7 @@ static bool at91_adc_current_chan_is_touch(struct iio_dev *indio_dev)
|
||||
AT91_SAMA5D2_MAX_CHAN_IDX + 1);
|
||||
}
|
||||
|
||||
static int at91_adc_buffer_preenable(struct iio_dev *indio_dev)
|
||||
static int at91_adc_buffer_prepare(struct iio_dev *indio_dev)
|
||||
{
|
||||
int ret;
|
||||
u8 bit;
|
||||
@ -901,7 +901,7 @@ static int at91_adc_buffer_preenable(struct iio_dev *indio_dev)
|
||||
/* we continue with the triggered buffer */
|
||||
ret = at91_adc_dma_start(indio_dev);
|
||||
if (ret) {
|
||||
dev_err(&indio_dev->dev, "buffer postenable failed\n");
|
||||
dev_err(&indio_dev->dev, "buffer prepare failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -989,7 +989,6 @@ static int at91_adc_buffer_postdisable(struct iio_dev *indio_dev)
|
||||
}
|
||||
|
||||
static const struct iio_buffer_setup_ops at91_buffer_setup_ops = {
|
||||
.preenable = &at91_adc_buffer_preenable,
|
||||
.postdisable = &at91_adc_buffer_postdisable,
|
||||
};
|
||||
|
||||
@ -1563,6 +1562,7 @@ static void at91_adc_dma_disable(struct platform_device *pdev)
|
||||
static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val)
|
||||
{
|
||||
struct at91_adc_state *st = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
||||
if (val > AT91_HWFIFO_MAX_SIZE)
|
||||
return -EINVAL;
|
||||
@ -1586,7 +1586,15 @@ static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val)
|
||||
else if (val > 1)
|
||||
at91_adc_dma_init(to_platform_device(&indio_dev->dev));
|
||||
|
||||
return 0;
|
||||
/*
|
||||
* We can start the DMA only after setting the watermark and
|
||||
* having the DMA initialization completed
|
||||
*/
|
||||
ret = at91_adc_buffer_prepare(indio_dev);
|
||||
if (ret)
|
||||
at91_adc_dma_disable(to_platform_device(&indio_dev->dev));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int at91_adc_update_scan_mode(struct iio_dev *indio_dev,
|
||||
@ -1764,17 +1772,13 @@ static int at91_adc_probe(struct platform_device *pdev)
|
||||
mutex_init(&st->lock);
|
||||
INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res)
|
||||
return -EINVAL;
|
||||
st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
|
||||
if (IS_ERR(st->base))
|
||||
return PTR_ERR(st->base);
|
||||
|
||||
/* if we plan to use DMA, we need the physical address of the regs */
|
||||
st->dma_st.phys_addr = res->start;
|
||||
|
||||
st->base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(st->base))
|
||||
return PTR_ERR(st->base);
|
||||
|
||||
st->irq = platform_get_irq(pdev, 0);
|
||||
if (st->irq <= 0) {
|
||||
if (!st->irq)
|
||||
|
||||
@ -357,7 +357,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_3);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
goto err_e_inval;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -374,7 +374,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
dev_err(dev,
|
||||
"Failed to get child reg property of ADC \"%pOFn\".\n",
|
||||
child);
|
||||
return ret;
|
||||
goto err_of_node_put;
|
||||
}
|
||||
|
||||
/* Channel number is too high. */
|
||||
@ -382,7 +382,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
dev_err(dev,
|
||||
"Only %i channels supported with %pOFn, but reg = <%i>.\n",
|
||||
num_channels, child, reg);
|
||||
return -EINVAL;
|
||||
goto err_e_inval;
|
||||
}
|
||||
}
|
||||
|
||||
@ -391,7 +391,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
dev_err(dev,
|
||||
"Channel %i uses different ADC mode than the rest.\n",
|
||||
reg);
|
||||
return -EINVAL;
|
||||
goto err_e_inval;
|
||||
}
|
||||
|
||||
/* Channel is valid, grab the regulator. */
|
||||
@ -401,7 +401,8 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
if (IS_ERR(vref)) {
|
||||
dev_dbg(dev, "Channel %i 'vref' supply not connected.\n",
|
||||
reg);
|
||||
return PTR_ERR(vref);
|
||||
ret = PTR_ERR(vref);
|
||||
goto err_of_node_put;
|
||||
}
|
||||
|
||||
priv->vref[reg] = vref;
|
||||
@ -425,8 +426,10 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
* attached to the GyroADC at a time, so if we found it,
|
||||
* we can stop parsing here.
|
||||
*/
|
||||
if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
|
||||
if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) {
|
||||
of_node_put(child);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (first) {
|
||||
@ -435,6 +438,12 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_e_inval:
|
||||
ret = -EINVAL;
|
||||
err_of_node_put:
|
||||
of_node_put(child);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void rcar_gyroadc_deinit_supplies(struct iio_dev *indio_dev)
|
||||
|
||||
@ -769,6 +769,13 @@ static int stm32_adc_core_runtime_resume(struct device *dev)
|
||||
{
|
||||
return stm32_adc_core_hw_start(dev);
|
||||
}
|
||||
|
||||
static int stm32_adc_core_runtime_idle(struct device *dev)
|
||||
{
|
||||
pm_runtime_mark_last_busy(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops stm32_adc_core_pm_ops = {
|
||||
@ -776,7 +783,7 @@ static const struct dev_pm_ops stm32_adc_core_pm_ops = {
|
||||
pm_runtime_force_resume)
|
||||
SET_RUNTIME_PM_OPS(stm32_adc_core_runtime_suspend,
|
||||
stm32_adc_core_runtime_resume,
|
||||
NULL)
|
||||
stm32_adc_core_runtime_idle)
|
||||
};
|
||||
|
||||
static const struct stm32_adc_priv_cfg stm32f4_adc_priv_cfg = {
|
||||
|
||||
@ -226,16 +226,13 @@ static int stm32_dfsdm_parse_of(struct platform_device *pdev,
|
||||
if (!node)
|
||||
return -EINVAL;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(&pdev->dev, "Failed to get memory resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
priv->dfsdm.phys_base = res->start;
|
||||
priv->dfsdm.base = devm_ioremap_resource(&pdev->dev, res);
|
||||
priv->dfsdm.base = devm_platform_get_and_ioremap_resource(pdev, 0,
|
||||
&res);
|
||||
if (IS_ERR(priv->dfsdm.base))
|
||||
return PTR_ERR(priv->dfsdm.base);
|
||||
|
||||
priv->dfsdm.phys_base = res->start;
|
||||
|
||||
/*
|
||||
* "dfsdm" clock is mandatory for DFSDM peripheral clocking.
|
||||
* "dfsdm" or "audio" clocks can be used as source clock for
|
||||
|
||||
@ -11,7 +11,7 @@ config IIO_BUFFER_CB
|
||||
usage. That is, those where the data is pushed to the consumer.
|
||||
|
||||
config IIO_BUFFER_DMA
|
||||
tristate
|
||||
tristate "Industrial I/O DMA buffer infrastructure"
|
||||
help
|
||||
Provides the generic IIO DMA buffer infrastructure that can be used by
|
||||
drivers for devices with DMA support to implement the IIO buffer.
|
||||
@ -20,13 +20,13 @@ config IIO_BUFFER_DMA
|
||||
infrastructure.
|
||||
|
||||
config IIO_BUFFER_DMAENGINE
|
||||
tristate
|
||||
tristate "Industrial I/O DMA buffer integration with DMAEngine"
|
||||
select IIO_BUFFER_DMA
|
||||
help
|
||||
Provides a bonding of the generic IIO DMA buffer infrastructure with the
|
||||
DMAengine framework. This can be used by converter drivers with a DMA port
|
||||
DMAEngine framework. This can be used by converter drivers with a DMA port
|
||||
connected to an external DMA controller which is supported by the
|
||||
DMAengine framework.
|
||||
DMAEngine framework.
|
||||
|
||||
Should be selected by drivers that want to use this functionality.
|
||||
|
||||
@ -48,7 +48,7 @@ config IIO_KFIFO_BUF
|
||||
often to read from the buffer.
|
||||
|
||||
config IIO_TRIGGERED_BUFFER
|
||||
tristate
|
||||
tristate "Industrial I/O triggered buffer support"
|
||||
select IIO_TRIGGER
|
||||
select IIO_KFIFO_BUF
|
||||
help
|
||||
|
||||
@ -159,7 +159,7 @@ static const struct attribute *iio_dmaengine_buffer_attrs[] = {
|
||||
* Once done using the buffer iio_dmaengine_buffer_free() should be used to
|
||||
* release it.
|
||||
*/
|
||||
struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
|
||||
static struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
|
||||
const char *channel)
|
||||
{
|
||||
struct dmaengine_buffer *dmaengine_buffer;
|
||||
@ -211,7 +211,6 @@ err_free:
|
||||
kfree(dmaengine_buffer);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
EXPORT_SYMBOL(iio_dmaengine_buffer_alloc);
|
||||
|
||||
/**
|
||||
* iio_dmaengine_buffer_free() - Free dmaengine buffer
|
||||
@ -219,7 +218,7 @@ EXPORT_SYMBOL(iio_dmaengine_buffer_alloc);
|
||||
*
|
||||
* Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
|
||||
*/
|
||||
void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
|
||||
static void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
|
||||
{
|
||||
struct dmaengine_buffer *dmaengine_buffer =
|
||||
iio_buffer_to_dmaengine_buffer(buffer);
|
||||
@ -229,7 +228,6 @@ void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
|
||||
|
||||
iio_buffer_put(buffer);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(iio_dmaengine_buffer_free);
|
||||
|
||||
static void __devm_iio_dmaengine_buffer_free(struct device *dev, void *res)
|
||||
{
|
||||
|
||||
@ -97,7 +97,8 @@ static int cros_ec_lid_angle_probe(struct platform_device *pdev)
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL, NULL);
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL,
|
||||
NULL, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
||||
@ -236,12 +236,11 @@ static int cros_ec_sensors_probe(struct platform_device *pdev)
|
||||
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
|
||||
cros_ec_sensors_capture,
|
||||
cros_ec_sensors_push_data);
|
||||
cros_ec_sensors_push_data,
|
||||
true);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
|
||||
|
||||
indio_dev->info = &ec_sensors_info;
|
||||
state = iio_priv(indio_dev);
|
||||
for (channel = state->channels, i = CROS_EC_SENSOR_X;
|
||||
|
||||
@ -177,12 +177,11 @@ static ssize_t hwfifo_watermark_max_show(struct device *dev,
|
||||
|
||||
static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
|
||||
|
||||
const struct attribute *cros_ec_sensor_fifo_attributes[] = {
|
||||
static const struct attribute *cros_ec_sensor_fifo_attributes[] = {
|
||||
&iio_dev_attr_hwfifo_timeout.dev_attr.attr,
|
||||
&iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(cros_ec_sensor_fifo_attributes);
|
||||
|
||||
int cros_ec_sensors_push_data(struct iio_dev *indio_dev,
|
||||
s16 *data,
|
||||
@ -241,6 +240,7 @@ static void cros_ec_sensors_core_clean(void *arg)
|
||||
* for backward compatibility.
|
||||
* @push_data: function to call when cros_ec_sensorhub receives
|
||||
* a sample for that sensor.
|
||||
* @has_hw_fifo: Set true if this device has/uses a HW FIFO
|
||||
*
|
||||
* Return: 0 on success, -errno on failure.
|
||||
*/
|
||||
@ -248,7 +248,8 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
|
||||
struct iio_dev *indio_dev,
|
||||
bool physical_device,
|
||||
cros_ec_sensors_capture_t trigger_capture,
|
||||
cros_ec_sensorhub_push_data_cb_t push_data)
|
||||
cros_ec_sensorhub_push_data_cb_t push_data,
|
||||
bool has_hw_fifo)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct cros_ec_sensors_core_state *state = iio_priv(indio_dev);
|
||||
@ -361,6 +362,10 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
|
||||
NULL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (has_hw_fifo)
|
||||
iio_buffer_set_attrs(indio_dev->buffer,
|
||||
cros_ec_sensor_fifo_attributes);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -503,7 +503,8 @@ static int ssp_probe(struct spi_device *spi)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = mfd_add_devices(&spi->dev, -1, sensorhub_sensor_devs,
|
||||
ret = mfd_add_devices(&spi->dev, PLATFORM_DEVID_NONE,
|
||||
sensorhub_sensor_devs,
|
||||
ARRAY_SIZE(sensorhub_sensor_devs), NULL, 0, NULL);
|
||||
if (ret < 0) {
|
||||
dev_err(&spi->dev, "mfd add devices fail\n");
|
||||
|
||||
@ -477,6 +477,7 @@ static const char *iio_event_group_name = "events";
|
||||
int iio_device_register_eventset(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
|
||||
struct iio_event_interface *ev_int;
|
||||
struct iio_dev_attr *p;
|
||||
int ret = 0, attrcount_orig = 0, attrcount, attrn;
|
||||
struct attribute **attr;
|
||||
@ -485,14 +486,15 @@ int iio_device_register_eventset(struct iio_dev *indio_dev)
|
||||
iio_check_for_dynamic_events(indio_dev)))
|
||||
return 0;
|
||||
|
||||
iio_dev_opaque->event_interface =
|
||||
kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL);
|
||||
if (iio_dev_opaque->event_interface == NULL)
|
||||
ev_int = kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL);
|
||||
if (ev_int == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
INIT_LIST_HEAD(&iio_dev_opaque->event_interface->dev_attr_list);
|
||||
iio_dev_opaque->event_interface = ev_int;
|
||||
|
||||
iio_setup_ev_int(iio_dev_opaque->event_interface);
|
||||
INIT_LIST_HEAD(&ev_int->dev_attr_list);
|
||||
|
||||
iio_setup_ev_int(ev_int);
|
||||
if (indio_dev->info->event_attrs != NULL) {
|
||||
attr = indio_dev->info->event_attrs->attrs;
|
||||
while (*attr++ != NULL)
|
||||
@ -506,34 +508,29 @@ int iio_device_register_eventset(struct iio_dev *indio_dev)
|
||||
attrcount += ret;
|
||||
}
|
||||
|
||||
iio_dev_opaque->event_interface->group.name = iio_event_group_name;
|
||||
iio_dev_opaque->event_interface->group.attrs = kcalloc(attrcount + 1,
|
||||
sizeof(iio_dev_opaque->event_interface->group.attrs[0]),
|
||||
GFP_KERNEL);
|
||||
if (iio_dev_opaque->event_interface->group.attrs == NULL) {
|
||||
ev_int->group.name = iio_event_group_name;
|
||||
ev_int->group.attrs = kcalloc(attrcount + 1,
|
||||
sizeof(ev_int->group.attrs[0]),
|
||||
GFP_KERNEL);
|
||||
if (ev_int->group.attrs == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto error_free_setup_event_lines;
|
||||
}
|
||||
if (indio_dev->info->event_attrs)
|
||||
memcpy(iio_dev_opaque->event_interface->group.attrs,
|
||||
memcpy(ev_int->group.attrs,
|
||||
indio_dev->info->event_attrs->attrs,
|
||||
sizeof(iio_dev_opaque->event_interface->group.attrs[0])
|
||||
*attrcount_orig);
|
||||
sizeof(ev_int->group.attrs[0]) * attrcount_orig);
|
||||
attrn = attrcount_orig;
|
||||
/* Add all elements from the list. */
|
||||
list_for_each_entry(p,
|
||||
&iio_dev_opaque->event_interface->dev_attr_list,
|
||||
l)
|
||||
iio_dev_opaque->event_interface->group.attrs[attrn++] =
|
||||
&p->dev_attr.attr;
|
||||
indio_dev->groups[indio_dev->groupcounter++] =
|
||||
&iio_dev_opaque->event_interface->group;
|
||||
list_for_each_entry(p, &ev_int->dev_attr_list, l)
|
||||
ev_int->group.attrs[attrn++] = &p->dev_attr.attr;
|
||||
indio_dev->groups[indio_dev->groupcounter++] = &ev_int->group;
|
||||
|
||||
return 0;
|
||||
|
||||
error_free_setup_event_lines:
|
||||
iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list);
|
||||
kfree(iio_dev_opaque->event_interface);
|
||||
iio_free_chan_devattr_list(&ev_int->dev_attr_list);
|
||||
kfree(ev_int);
|
||||
iio_dev_opaque->event_interface = NULL;
|
||||
return ret;
|
||||
}
|
||||
@ -557,10 +554,12 @@ void iio_device_wakeup_eventset(struct iio_dev *indio_dev)
|
||||
void iio_device_unregister_eventset(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
|
||||
struct iio_event_interface *ev_int = iio_dev_opaque->event_interface;
|
||||
|
||||
if (iio_dev_opaque->event_interface == NULL)
|
||||
if (ev_int == NULL)
|
||||
return;
|
||||
iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list);
|
||||
kfree(iio_dev_opaque->event_interface->group.attrs);
|
||||
kfree(iio_dev_opaque->event_interface);
|
||||
iio_free_chan_devattr_list(&ev_int->dev_attr_list);
|
||||
kfree(ev_int->group.attrs);
|
||||
kfree(ev_int);
|
||||
iio_dev_opaque->event_interface = NULL;
|
||||
}
|
||||
|
||||
@ -182,12 +182,11 @@ static int cros_ec_light_prox_probe(struct platform_device *pdev)
|
||||
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
|
||||
cros_ec_sensors_capture,
|
||||
cros_ec_sensors_push_data);
|
||||
cros_ec_sensors_push_data,
|
||||
true);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
|
||||
|
||||
indio_dev->info = &cros_ec_light_prox_info;
|
||||
state = iio_priv(indio_dev);
|
||||
state->core.type = state->core.resp->info.type;
|
||||
|
||||
@ -566,7 +566,7 @@ static int gp2ap002_probe(struct i2c_client *client,
|
||||
|
||||
/*
|
||||
* Initialize the device and signal to runtime PM that now we are
|
||||
* definately up and using power.
|
||||
* definitely up and using power.
|
||||
*/
|
||||
ret = gp2ap002_init(gp2ap002);
|
||||
if (ret) {
|
||||
|
||||
@ -139,12 +139,11 @@ static int cros_ec_baro_probe(struct platform_device *pdev)
|
||||
|
||||
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
|
||||
cros_ec_sensors_capture,
|
||||
cros_ec_sensors_push_data);
|
||||
cros_ec_sensors_push_data,
|
||||
true);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
|
||||
|
||||
indio_dev->info = &cros_ec_baro_info;
|
||||
state = iio_priv(indio_dev);
|
||||
state->core.type = state->core.resp->info.type;
|
||||
|
||||
@ -1285,18 +1285,20 @@ static int ltc2983_parse_dt(struct ltc2983_data *st)
|
||||
ret = of_property_read_u32(child, "reg", &sensor.chan);
|
||||
if (ret) {
|
||||
dev_err(dev, "reg property must given for child nodes\n");
|
||||
return ret;
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
/* check if we have a valid channel */
|
||||
if (sensor.chan < LTC2983_MIN_CHANNELS_NR ||
|
||||
sensor.chan > LTC2983_MAX_CHANNELS_NR) {
|
||||
ret = -EINVAL;
|
||||
dev_err(dev,
|
||||
"chan:%d must be from 1 to 20\n", sensor.chan);
|
||||
return -EINVAL;
|
||||
goto put_child;
|
||||
} else if (channel_avail_mask & BIT(sensor.chan)) {
|
||||
ret = -EINVAL;
|
||||
dev_err(dev, "chan:%d already in use\n", sensor.chan);
|
||||
return -EINVAL;
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
ret = of_property_read_u32(child, "adi,sensor-type",
|
||||
@ -1304,7 +1306,7 @@ static int ltc2983_parse_dt(struct ltc2983_data *st)
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"adi,sensor-type property must given for child nodes\n");
|
||||
return ret;
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
dev_dbg(dev, "Create new sensor, type %u, chann %u",
|
||||
@ -1334,13 +1336,15 @@ static int ltc2983_parse_dt(struct ltc2983_data *st)
|
||||
st->sensors[chan] = ltc2983_adc_new(child, st, &sensor);
|
||||
} else {
|
||||
dev_err(dev, "Unknown sensor type %d\n", sensor.type);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto put_child;
|
||||
}
|
||||
|
||||
if (IS_ERR(st->sensors[chan])) {
|
||||
dev_err(dev, "Failed to create sensor %ld",
|
||||
PTR_ERR(st->sensors[chan]));
|
||||
return PTR_ERR(st->sensors[chan]);
|
||||
ret = PTR_ERR(st->sensors[chan]);
|
||||
goto put_child;
|
||||
}
|
||||
/* set generic sensor parameters */
|
||||
st->sensors[chan]->chan = sensor.chan;
|
||||
@ -1351,6 +1355,9 @@ static int ltc2983_parse_dt(struct ltc2983_data *st)
|
||||
}
|
||||
|
||||
return 0;
|
||||
put_child:
|
||||
of_node_put(child);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ltc2983_setup(struct ltc2983_data *st, bool assign_iio)
|
||||
|
||||
@ -10,10 +10,6 @@
|
||||
struct iio_buffer;
|
||||
struct device;
|
||||
|
||||
struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
|
||||
const char *channel);
|
||||
void iio_dmaengine_buffer_free(struct iio_buffer *buffer);
|
||||
|
||||
struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev,
|
||||
const char *channel);
|
||||
|
||||
|
||||
@ -96,7 +96,8 @@ struct platform_device;
|
||||
int cros_ec_sensors_core_init(struct platform_device *pdev,
|
||||
struct iio_dev *indio_dev, bool physical_device,
|
||||
cros_ec_sensors_capture_t trigger_capture,
|
||||
cros_ec_sensorhub_push_data_cb_t push_data);
|
||||
cros_ec_sensorhub_push_data_cb_t push_data,
|
||||
bool has_hw_fifo);
|
||||
|
||||
irqreturn_t cros_ec_sensors_capture(int irq, void *p);
|
||||
int cros_ec_sensors_push_data(struct iio_dev *indio_dev,
|
||||
@ -125,6 +126,5 @@ extern const struct dev_pm_ops cros_ec_sensors_pm_ops;
|
||||
|
||||
/* List of extended channel specification for all sensors. */
|
||||
extern const struct iio_chan_spec_ext_info cros_ec_sensors_ext_info[];
|
||||
extern const struct attribute *cros_ec_sensor_fifo_attributes[];
|
||||
|
||||
#endif /* __CROS_EC_SENSORS_CORE_H */
|
||||
|
||||
@ -1,13 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef __IIO_AD7291_H__
|
||||
#define __IIO_AD7291_H__
|
||||
|
||||
/**
|
||||
* struct ad7291_platform_data - AD7291 platform data
|
||||
* @use_external_ref: Whether to use an external or internal reference voltage
|
||||
*/
|
||||
struct ad7291_platform_data {
|
||||
bool use_external_ref;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user