Staging: mt7621-pci: Fix alignment warnings

Fix the alignment issue pointed out by checkpatch

Signed-off-by: Siddhant Gupta <siddhantgupta416@gmail.com>
Link: https://lore.kernel.org/r/20201106093021.GA25237@Sleakybeast
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Siddhant Gupta 2020-11-06 15:00:21 +05:30 committed by Greg Kroah-Hartman
parent eb27cf085c
commit 99c1fdae1a

View File

@ -278,8 +278,8 @@ static void setup_cm_memory_region(struct mt7621_pcie *pcie)
write_gcr_reg1_base(mem_resource->start);
write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0);
dev_info(dev, "PCI coherence region base: 0x%08llx, mask/settings: 0x%08llx\n",
(unsigned long long)read_gcr_reg1_base(),
(unsigned long long)read_gcr_reg1_mask());
(unsigned long long)read_gcr_reg1_base(),
(unsigned long long)read_gcr_reg1_mask());
}
}