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mt76: mt7915: measure channel noise and report it via survey

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Read per-stream measurements every 100 ms and build a simple moving average.

Tested-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Ryder Lee 2020-09-24 23:23:13 +08:00 committed by Felix Fietkau
parent 9eb597c744
commit 998493980e
4 changed files with 55 additions and 6 deletions
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50
drivers/net/wireless/mediatek/mt76/mt7915/mac.c
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@ -1081,17 +1081,49 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy)
MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
}
/*
* TODO: mib counters are read-clear and there're many HE functionalities need
* such info, hence firmware prepares a task to read the fields out to a shared
* structure. User should switch to use event format to avoid race condition.
*/
void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy)
{
mt7915_l2_set(dev, MT_WF_PHY_RXTD12(ext_phy),
MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY |
MT_WF_PHY_RXTD12_IRPI_SW_CLR);
mt7915_l2_set(dev, MT_WF_PHY_RX_CTRL1(ext_phy),
FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5));
}
static u8
mt7915_phy_get_nf(struct mt7915_phy *phy, int idx)
{
static const u8 nf_power[] = { 92, 89, 86, 83, 80, 75, 70, 65, 60, 55, 52 };
struct mt7915_dev *dev = phy->dev;
u32 val, sum = 0, n = 0;
int nss, i;
/* TODO: DBDC: 0,1 for 2.4G, 2,3 for 5G */
for (nss = 0; nss < hweight8(phy->chainmask); nss++) {
u32 reg = MT_WF_IRPI(nss);
for (i = 0; i < ARRAY_SIZE(nf_power); i++, reg += 4) {
val = mt7915_l2_rr(dev, reg);
sum += val * nf_power[i];
n += val;
}
}
if (!n)
return 0;
return sum / n;
}
static void
mt7915_phy_update_channel(struct mt76_phy *mphy, int idx)
{
struct mt7915_dev *dev = container_of(mphy->dev, struct mt7915_dev, mt76);
struct mt7915_phy *phy = (struct mt7915_phy *)mphy->priv;
struct mt76_channel_state *state;
u64 busy_time, tx_time, rx_time, obss_time;
int nf;
busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
MT_MIB_SDR9_BUSY_MASK);
@ -1102,12 +1134,18 @@ mt7915_phy_update_channel(struct mt76_phy *mphy, int idx)
obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx),
MT_MIB_OBSSTIME_MASK);
/* TODO: state->noise */
nf = mt7915_phy_get_nf(phy, idx);
if (!phy->noise)
phy->noise = nf << 4;
else if (nf)
phy->noise += nf - (phy->noise >> 4);
state = mphy->chan_state;
state->cc_busy += busy_time;
state->cc_tx += tx_time;
state->cc_rx += rx_time + obss_time;
state->cc_bss_rx += rx_time;
state->noise = -(phy->noise >> 4);
}
void mt7915_update_channel(struct mt76_dev *mdev)

2
drivers/net/wireless/mediatek/mt76/mt7915/main.c
View File

@ -34,12 +34,14 @@ static int mt7915_start(struct ieee80211_hw *hw)
mt7915_mcu_set_pm(dev, 0, 0);
mt7915_mcu_set_mac(dev, 0, true, false);
mt7915_mcu_set_scs(dev, 0, true);
mt7915_mac_enable_nf(dev, 0);
}
if (phy != &dev->phy) {
mt7915_mcu_set_pm(dev, 1, 0);
mt7915_mcu_set_mac(dev, 1, true, false);
mt7915_mcu_set_scs(dev, 1, true);
mt7915_mac_enable_nf(dev, 1);
}
mt7915_mcu_set_sku_en(phy, true);

1
drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h
View File

@ -428,6 +428,7 @@ mt7915_l2_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val)
bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
void mt7915_mac_reset_counters(struct mt7915_phy *phy);
void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_key_conf *key, bool beacon);

8
drivers/net/wireless/mediatek/mt76/mt7915/regs.h
View File

@ -385,11 +385,19 @@
#define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs))
#define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188)
#define MT_WF_IRPI_BASE 0x83006000
#define MT_WF_IRPI(ofs) (MT_WF_IRPI_BASE + ((ofs) << 16))
/* PHY: band 0(0x83080000), band 1(0x83090000) */
#define MT_WF_PHY_BASE 0x83080000
#define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs))
#define MT_WF_PHY_RX_CTRL1(_phy) MT_WF_PHY(0x2004 + ((_phy) << 16))
#define MT_WF_PHY_RX_CTRL1_IPI_EN GENMASK(2, 0)
#define MT_WF_PHY_RX_CTRL1_STSCNT_EN GENMASK(11, 9)
#define MT_WF_PHY_RXTD12(_phy) MT_WF_PHY(0x8230 + ((_phy) << 16))
#define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18)
#define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29)
#endif