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ARM: dts: Add support for more than 2GB of memory for omap5

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Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec31
("ARM: dts: DRA7: change address-cells and size-cells").

Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2016-09-13 16:10:56 -07:00
parent 0af28cc926
commit 98cc4544d6
4 changed files with 14 additions and 14 deletions
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2
arch/arm/boot/dts/omap5-cm-t54.dts
View File

@ -13,7 +13,7 @@
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x7F000000>; /* 2048 MB */
reg = <0 0x80000000 0 0x7f000000>; /* 2048 MB */
};
aliases {

2
arch/arm/boot/dts/omap5-igep0050.dts
View File

@ -16,7 +16,7 @@
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x7f000000>; /* 2032 MB */
reg = <0x0 0x80000000 0 0x7f000000>; /* 2032 MB */
};
gpio_keys {

2
arch/arm/boot/dts/omap5-uevm.dts
View File

@ -15,7 +15,7 @@
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x7F000000>; /* 2032 MB */
reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
};
leds {

22
arch/arm/boot/dts/omap5.dtsi
View File

@ -12,8 +12,8 @@
#include <dt-bindings/pinctrl/omap.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
compatible = "ti,omap5";
interrupt-parent = <&wakeupgen>;
@ -90,10 +90,10 @@
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48211000 0x1000>,
<0x48212000 0x1000>,
<0x48214000 0x2000>,
<0x48216000 0x2000>;
reg = <0 0x48211000 0 0x1000>,
<0 0x48212000 0 0x1000>,
<0 0x48214000 0 0x2000>,
<0 0x48216000 0 0x2000>;
interrupt-parent = <&gic>;
};
@ -101,7 +101,7 @@
compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48281000 0x1000>;
reg = <0 0x48281000 0 0x1000>;
interrupt-parent = <&gic>;
};
@ -129,11 +129,11 @@
compatible = "ti,omap5-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0 0 0 0xc0000000>;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
reg = <0x44000000 0x2000>,
<0x44800000 0x3000>,
<0x45000000 0x4000>;
reg = <0 0x44000000 0 0x2000>,
<0 0x44800000 0 0x3000>,
<0 0x45000000 0 0x4000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;