drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
Looks like DPF was not implemented for gen8+ but the IER and IMR are still enabled on initialization. Since there is no code to handle this interrupt, gate the irq enablement behind HAS_L3_DPF in case the feature gets enabled in the future. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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@ -3796,7 +3796,6 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
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uint32_t gt_interrupts[] = {
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uint32_t gt_interrupts[] = {
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GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_RENDER_L3_PARITY_ERROR_INTERRUPT |
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GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
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GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
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GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
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GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
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@ -3808,6 +3807,9 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT
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};
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};
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if (HAS_L3_DPF(dev_priv))
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gt_interrupts[0] |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
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dev_priv->pm_irq_mask = 0xffffffff;
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dev_priv->pm_irq_mask = 0xffffffff;
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GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
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GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
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GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
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GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
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