staging: et131x: Fix i386 build warnings from use of dma_addr_t

dma_addr_t can be of size 64 or 32bits, depending on the architecture.

This fixes these build warnings for ARCH=i386, and also tested on x86_64:

drivers/staging/et131x/et131x.c: In function ‘et131x_rx_dma_memory_alloc’:
drivers/staging/et131x/et131x.c:2356:11: warning: passing argument 2 of ‘et131x_align_allocated_memory’ from incompatible pointer type [enabled by default]
drivers/staging/et131x/et131x.c:2260:13: note: expected ‘u64 *’ but argument is of type ‘dma_addr_t *’
drivers/staging/et131x/et131x.c:2378:11: warning: passing argument 2 of ‘et131x_align_allocated_memory’ from incompatible pointer type [enabled by default]
drivers/staging/et131x/et131x.c:2260:13: note: expected ‘u64 *’ but argument is of type ‘dma_addr_t *’
drivers/staging/et131x/et131x.c: In function ‘free_send_packet’:
drivers/staging/et131x/et131x.c:3540:5: warning: left shift count >= width of type [enabled by default]

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Mark Einon <mark.einon@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mark Einon 2012-10-23 23:34:15 +01:00 committed by Greg Kroah-Hartman
parent 40991e4fa6
commit 983e4b3566

View File

@ -292,10 +292,10 @@ struct fbr_lookup {
dma_addr_t ring_physaddr;
void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
u64 offset;
dma_addr_t offset;
u32 local_full;
u32 num_entries;
u32 buffsize;
dma_addr_t buffsize;
};
/*
@ -2258,7 +2258,7 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit)
* @mask: correct mask
*/
static void et131x_align_allocated_memory(struct et131x_adapter *adapter,
u64 *phys_addr, u64 *offset,
dma_addr_t *phys_addr, dma_addr_t *offset,
u64 mask)
{
u64 new_addr = *phys_addr & ~mask;
@ -2382,8 +2382,8 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
rx_ring->fbr[1]->offset);
for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) {
u64 fbr1_tmp_physaddr;
u64 fbr1_offset;
dma_addr_t fbr1_tmp_physaddr;
dma_addr_t fbr1_offset;
u32 fbr1_align;
/* This code allocates an area of memory big enough for N
@ -2447,8 +2447,8 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
/* Same for FBR0 (if in use) */
for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) {
u64 fbr0_tmp_physaddr;
u64 fbr0_offset;
dma_addr_t fbr0_tmp_physaddr;
dma_addr_t fbr0_offset;
fbr_chunksize =
((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1;
@ -3513,7 +3513,7 @@ static inline void free_send_packet(struct et131x_adapter *adapter,
unsigned long flags;
struct tx_desc *desc = NULL;
struct net_device_stats *stats = &adapter->net_stats;
dma_addr_t dma_addr;
u64 dma_addr;
if (tcb->flags & fMP_DEST_BROAD)
atomic_inc(&adapter->stats.broadcast_pkts_xmtd);
@ -3535,9 +3535,7 @@ static inline void free_send_packet(struct et131x_adapter *adapter,
INDEX10(tcb->index_start));
dma_addr = desc->addr_lo;
if (sizeof(dma_addr_t) == sizeof(u64))
dma_addr |= ((dma_addr_t)desc->addr_hi) << 32;
dma_addr |= (u64)desc->addr_hi << 32;
dma_unmap_single(&adapter->pdev->dev,
dma_addr,