drm/nouveau/secboot: remove ls_ucode_mgr
This was used only locally to one function and can be replaced by ad-hoc variables. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -278,75 +278,44 @@ ls_ucode_img_fill_headers(struct acr_r352 *acr, struct ls_ucode_img *img,
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}
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/**
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* struct ls_ucode_mgr - manager for all LS falcon firmwares
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* @count: number of managed LS falcons
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* @wpr_size: size of the required WPR region in bytes
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* @img_list: linked list of lsf_ucode_img
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* acr_r352_ls_fill_headers - fill WPR and LSB headers of all managed images
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*/
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struct ls_ucode_mgr {
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u16 count;
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u32 wpr_size;
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struct list_head img_list;
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};
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static void
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ls_ucode_mgr_init(struct ls_ucode_mgr *mgr)
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{
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memset(mgr, 0, sizeof(*mgr));
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INIT_LIST_HEAD(&mgr->img_list);
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}
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static void
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ls_ucode_mgr_cleanup(struct ls_ucode_mgr *mgr)
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{
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struct ls_ucode_img *img, *t;
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list_for_each_entry_safe(img, t, &mgr->img_list, node) {
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kfree(img->ucode_data);
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kfree(img);
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}
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}
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static void
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ls_ucode_mgr_add_img(struct ls_ucode_mgr *mgr, struct ls_ucode_img *img)
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{
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mgr->count++;
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list_add_tail(&img->node, &mgr->img_list);
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}
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/**
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* ls_ucode_mgr_fill_headers - fill WPR and LSB headers of all managed images
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*/
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static void
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ls_ucode_mgr_fill_headers(struct acr_r352 *acr, struct ls_ucode_mgr *mgr)
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static int
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acr_r352_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs)
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{
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struct ls_ucode_img *img;
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struct list_head *l;
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u32 count = 0;
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u32 offset;
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/* Count the number of images to manage */
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list_for_each(l, imgs)
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count++;
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/*
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* Start with an array of WPR headers at the base of the WPR.
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* The expectation here is that the secure falcon will do a single DMA
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* read of this array and cache it internally so it's ok to pack these.
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* Also, we add 1 to the falcon count to indicate the end of the array.
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*/
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offset = sizeof(struct lsf_wpr_header) * (mgr->count + 1);
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offset = sizeof(struct lsf_wpr_header) * (count + 1);
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/*
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* Walk the managed falcons, accounting for the LSB structs
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* as well as the ucode images.
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*/
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list_for_each_entry(img, &mgr->img_list, node) {
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list_for_each_entry(img, imgs, node) {
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offset = ls_ucode_img_fill_headers(acr, img, offset);
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}
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mgr->wpr_size = offset;
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return offset;
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}
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/**
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* ls_ucode_mgr_write_wpr - write the WPR blob contents
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*/
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static int
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ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct ls_ucode_mgr *mgr,
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ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct list_head *imgs,
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struct nvkm_gpuobj *wpr_blob, u32 wpr_addr)
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{
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struct ls_ucode_img *img;
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@ -354,7 +323,7 @@ ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct ls_ucode_mgr *mgr,
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nvkm_kmap(wpr_blob);
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list_for_each_entry(img, &mgr->img_list, node) {
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list_for_each_entry(img, imgs, node) {
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const struct acr_r352_ls_func *ls_func =
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acr->func->ls_func[img->falcon_id];
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u8 gdesc[ls_func->bl_desc_size];
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@ -399,12 +368,15 @@ static int
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acr_r352_prepare_ls_blob(struct acr_r352 *acr, u64 wpr_addr, u32 wpr_size)
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{
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const struct nvkm_subdev *subdev = acr->base.subdev;
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struct ls_ucode_mgr mgr;
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struct list_head imgs;
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struct ls_ucode_img *img, *t;
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unsigned long managed_falcons = acr->base.managed_falcons;
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int managed_count = 0;
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u32 image_wpr_size;
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int falcon_id;
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int ret;
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ls_ucode_mgr_init(&mgr);
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INIT_LIST_HEAD(&imgs);
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/* Load all LS blobs */
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for_each_set_bit(falcon_id, &managed_falcons, NVKM_SECBOOT_FALCON_END) {
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@ -417,48 +389,52 @@ acr_r352_prepare_ls_blob(struct acr_r352 *acr, u64 wpr_addr, u32 wpr_size)
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ret = PTR_ERR(img);
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goto cleanup;
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}
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ls_ucode_mgr_add_img(&mgr, img);
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list_add_tail(&img->node, &imgs);
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managed_count++;
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}
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/*
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* Fill the WPR and LSF headers with the right offsets and compute
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* required WPR size
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*/
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ls_ucode_mgr_fill_headers(acr, &mgr);
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mgr.wpr_size = ALIGN(mgr.wpr_size, WPR_ALIGNMENT);
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image_wpr_size = acr_r352_ls_fill_headers(acr, &imgs);
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image_wpr_size = ALIGN(image_wpr_size, WPR_ALIGNMENT);
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/* Allocate GPU object that will contain the WPR region */
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ret = nvkm_gpuobj_new(subdev->device, mgr.wpr_size, WPR_ALIGNMENT,
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ret = nvkm_gpuobj_new(subdev->device, image_wpr_size, WPR_ALIGNMENT,
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false, NULL, &acr->ls_blob);
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if (ret)
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goto cleanup;
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nvkm_debug(subdev, "%d managed LS falcons, WPR size is %d bytes\n",
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mgr.count, mgr.wpr_size);
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managed_count, image_wpr_size);
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/* If WPR address and size are not fixed, set them to fit the LS blob */
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if (wpr_size == 0) {
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wpr_addr = acr->ls_blob->addr;
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wpr_size = mgr.wpr_size;
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wpr_size = image_wpr_size;
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/*
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* But if the WPR region is set by the bootloader, it is illegal for
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* the HS blob to be larger than this region.
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*/
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} else if (mgr.wpr_size > wpr_size) {
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} else if (image_wpr_size > wpr_size) {
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nvkm_error(subdev, "WPR region too small for FW blob!\n");
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nvkm_error(subdev, "required: %dB\n", mgr.wpr_size);
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nvkm_error(subdev, "required: %dB\n", image_wpr_size);
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nvkm_error(subdev, "available: %dB\n", wpr_size);
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ret = -ENOSPC;
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goto cleanup;
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}
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/* Write LS blob */
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ret = ls_ucode_mgr_write_wpr(acr, &mgr, acr->ls_blob, wpr_addr);
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ret = ls_ucode_mgr_write_wpr(acr, &imgs, acr->ls_blob, wpr_addr);
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if (ret)
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nvkm_gpuobj_del(&acr->ls_blob);
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cleanup:
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ls_ucode_mgr_cleanup(&mgr);
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list_for_each_entry_safe(img, t, &imgs, node) {
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kfree(img->ucode_data);
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kfree(img);
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}
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return ret;
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}
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