forked from Minki/linux
ASoC: TWL4030: Make offset cancellation path configurable
Add means for machine drivers to select the path for offset cancellation. Reset the reg cache value to the chip reset value at the same time. Machine drivers can specify which path need to be used for offset cancellation via the twl4030_setup.offset_cncl_path. For paths use the defines from include/linux/mfd/twl4030-codec.h: TWL4030_OFFSET_CNCL_SEL_* Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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@ -46,7 +46,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
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0xc3, /* REG_OPTION (0x2) */
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0x00, /* REG_UNKNOWN (0x3) */
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0x00, /* REG_MICBIAS_CTL (0x4) */
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0x20, /* REG_ANAMICL (0x5) */
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0x00, /* REG_ANAMICL (0x5) */
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0x00, /* REG_ANAMICR (0x6) */
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0x00, /* REG_AVADC_CTL (0x7) */
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0x00, /* REG_ADCMICSEL (0x8) */
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@ -281,6 +281,8 @@ static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
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static void twl4030_power_up(struct snd_soc_codec *codec)
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{
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struct snd_soc_device *socdev = codec->socdev;
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struct twl4030_setup_data *setup = socdev->codec_data;
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struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
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u8 anamicl, regmisc1, byte;
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int i = 0;
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@ -293,6 +295,8 @@ static void twl4030_power_up(struct snd_soc_codec *codec)
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/* initiate offset cancellation */
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anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
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anamicl &= ~TWL4030_OFFSET_CNCL_SEL;
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anamicl |= setup->offset_cncl_path;
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twl4030_write(codec, TWL4030_REG_ANAMICL,
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anamicl | TWL4030_CNCL_OFFSET_START);
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@ -42,6 +42,7 @@ extern struct snd_soc_codec_device soc_codec_dev_twl4030;
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struct twl4030_setup_data {
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unsigned int ramp_delay_value;
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unsigned int sysclk;
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unsigned int offset_cncl_path;
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unsigned int hs_extmute:1;
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void (*set_hs_extmute)(int mute);
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};
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