One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine, some

MAINTAINERS maintainance, and a clk / reset switch to our headers.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYG2bAQAKCRDj7w1vZxhR
 xW/cAQDpP3oAyk00M6ZMKIMefm/DQI3qbf9cA0P9JsPa1inNbAEA0WlHJt2zdGRT
 ISRW7PI1TyHxMcVteyiw7gE5BvU7kAQ=
 =Jgu5
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine, some
MAINTAINERS maintainance, and a clk / reset switch to our headers.

* tag 'sunxi-fixes-for-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference
  MAINTAINERS: Match on allwinner keyword
  MAINTAINERS: Add our new mailing-list
  arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems
  arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices

Link: https://lore.kernel.org/r/9972a85e-60b7-49f4-a246-db3396dd4764.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-04-08 17:35:52 +02:00
commit 974be36e1c
5 changed files with 9 additions and 7 deletions

View File

@ -1576,11 +1576,13 @@ R: Jernej Skrabec <jernej.skrabec@siol.net>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
L: linux-sunxi@lists.linux.dev
F: arch/arm/mach-sunxi/
F: arch/arm64/boot/dts/allwinner/
F: drivers/clk/sunxi-ng/
F: drivers/pinctrl/sunxi/
F: drivers/soc/sunxi/
N: allwinner
N: sun[x456789]i
N: sun50i

View File

@ -19,3 +19,7 @@
};
};
};
&mmc0 {
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 push-push switch */
};

View File

@ -34,7 +34,7 @@
vmmc-supply = <&reg_dcdc1>;
disable-wp;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
status = "okay";
};

View File

@ -289,10 +289,6 @@
vcc-pm-supply = <&reg_aldo1>;
};
&rtc {
clocks = <&ext_osc32k>;
};
&spdif {
status = "okay";
};

View File

@ -995,9 +995,9 @@
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x07083000 0x400>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu 13>;
clocks = <&r_ccu CLK_R_APB2_RSB>;
clock-frequency = <3000000>;
resets = <&r_ccu 7>;
resets = <&r_ccu RST_R_APB2_RSB>;
pinctrl-names = "default";
pinctrl-0 = <&r_rsb_pins>;
status = "disabled";