forked from Minki/linux
iw_cxgb4: Adds support for T6 adapter
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
parent
2799980597
commit
963cab5082
drivers/infiniband/hw/cxgb4
@ -632,22 +632,18 @@ static void best_mtu(const unsigned short *mtus, unsigned short mtu,
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static int send_connect(struct c4iw_ep *ep)
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{
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struct cpl_act_open_req *req;
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struct cpl_t5_act_open_req *t5_req;
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struct cpl_act_open_req6 *req6;
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struct cpl_t5_act_open_req6 *t5_req6;
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struct cpl_act_open_req *req = NULL;
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struct cpl_t5_act_open_req *t5req = NULL;
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struct cpl_t6_act_open_req *t6req = NULL;
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struct cpl_act_open_req6 *req6 = NULL;
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struct cpl_t5_act_open_req6 *t5req6 = NULL;
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struct cpl_t6_act_open_req6 *t6req6 = NULL;
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struct sk_buff *skb;
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u64 opt0;
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u32 opt2;
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unsigned int mtu_idx;
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int wscale;
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int wrlen;
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int sizev4 = is_t4(ep->com.dev->rdev.lldi.adapter_type) ?
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sizeof(struct cpl_act_open_req) :
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sizeof(struct cpl_t5_act_open_req);
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int sizev6 = is_t4(ep->com.dev->rdev.lldi.adapter_type) ?
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sizeof(struct cpl_act_open_req6) :
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sizeof(struct cpl_t5_act_open_req6);
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int win, sizev4, sizev6, wrlen;
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struct sockaddr_in *la = (struct sockaddr_in *)
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&ep->com.mapped_local_addr;
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struct sockaddr_in *ra = (struct sockaddr_in *)
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@ -656,8 +652,28 @@ static int send_connect(struct c4iw_ep *ep)
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&ep->com.mapped_local_addr;
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struct sockaddr_in6 *ra6 = (struct sockaddr_in6 *)
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&ep->com.mapped_remote_addr;
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int win;
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int ret;
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enum chip_type adapter_type = ep->com.dev->rdev.lldi.adapter_type;
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u32 isn = (prandom_u32() & ~7UL) - 1;
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switch (CHELSIO_CHIP_VERSION(adapter_type)) {
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case CHELSIO_T4:
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sizev4 = sizeof(struct cpl_act_open_req);
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sizev6 = sizeof(struct cpl_act_open_req6);
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break;
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case CHELSIO_T5:
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sizev4 = sizeof(struct cpl_t5_act_open_req);
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sizev6 = sizeof(struct cpl_t5_act_open_req6);
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break;
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case CHELSIO_T6:
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sizev4 = sizeof(struct cpl_t6_act_open_req);
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sizev6 = sizeof(struct cpl_t6_act_open_req6);
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break;
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default:
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pr_err("T%d Chip is not supported\n",
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CHELSIO_CHIP_VERSION(adapter_type));
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return -EINVAL;
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}
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wrlen = (ep->com.remote_addr.ss_family == AF_INET) ?
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roundup(sizev4, 16) :
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@ -706,7 +722,10 @@ static int send_connect(struct c4iw_ep *ep)
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opt2 |= SACK_EN_F;
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if (wscale && enable_tcp_window_scaling)
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opt2 |= WND_SCALE_EN_F;
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if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
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if (CHELSIO_CHIP_VERSION(adapter_type) > CHELSIO_T4) {
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if (peer2peer)
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isn += 4;
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opt2 |= T5_OPT_2_VALID_F;
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opt2 |= CONG_CNTRL_V(CONG_ALG_TAHOE);
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opt2 |= T5_ISS_F;
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@ -718,102 +737,109 @@ static int send_connect(struct c4iw_ep *ep)
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t4_set_arp_err_handler(skb, ep, act_open_req_arp_failure);
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if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) {
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if (ep->com.remote_addr.ss_family == AF_INET) {
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switch (CHELSIO_CHIP_VERSION(adapter_type)) {
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case CHELSIO_T4:
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req = (struct cpl_act_open_req *)skb_put(skb, wrlen);
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INIT_TP_WR(req, 0);
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OPCODE_TID(req) = cpu_to_be32(
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MK_OPCODE_TID(CPL_ACT_OPEN_REQ,
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break;
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case CHELSIO_T5:
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t5req = (struct cpl_t5_act_open_req *)skb_put(skb,
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wrlen);
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INIT_TP_WR(t5req, 0);
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req = (struct cpl_act_open_req *)t5req;
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break;
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case CHELSIO_T6:
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t6req = (struct cpl_t6_act_open_req *)skb_put(skb,
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wrlen);
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INIT_TP_WR(t6req, 0);
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req = (struct cpl_act_open_req *)t6req;
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t5req = (struct cpl_t5_act_open_req *)t6req;
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break;
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default:
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pr_err("T%d Chip is not supported\n",
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CHELSIO_CHIP_VERSION(adapter_type));
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ret = -EINVAL;
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goto clip_release;
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}
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OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ,
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((ep->rss_qid<<14) | ep->atid)));
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req->local_port = la->sin_port;
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req->peer_port = ra->sin_port;
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req->local_ip = la->sin_addr.s_addr;
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req->peer_ip = ra->sin_addr.s_addr;
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req->opt0 = cpu_to_be64(opt0);
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if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) {
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req->params = cpu_to_be32(cxgb4_select_ntuple(
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ep->com.dev->rdev.lldi.ports[0],
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ep->l2t));
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req->opt2 = cpu_to_be32(opt2);
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} else {
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t5req->params = cpu_to_be64(FILTER_TUPLE_V(
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cxgb4_select_ntuple(
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ep->com.dev->rdev.lldi.ports[0],
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ep->l2t)));
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t5req->rsvd = cpu_to_be32(isn);
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PDBG("%s snd_isn %u\n", __func__, t5req->rsvd);
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t5req->opt2 = cpu_to_be32(opt2);
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}
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} else {
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switch (CHELSIO_CHIP_VERSION(adapter_type)) {
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case CHELSIO_T4:
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req6 = (struct cpl_act_open_req6 *)skb_put(skb, wrlen);
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INIT_TP_WR(req6, 0);
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OPCODE_TID(req6) = cpu_to_be32(
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MK_OPCODE_TID(CPL_ACT_OPEN_REQ6,
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break;
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case CHELSIO_T5:
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t5req6 = (struct cpl_t5_act_open_req6 *)skb_put(skb,
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wrlen);
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INIT_TP_WR(t5req6, 0);
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req6 = (struct cpl_act_open_req6 *)t5req6;
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break;
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case CHELSIO_T6:
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t6req6 = (struct cpl_t6_act_open_req6 *)skb_put(skb,
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wrlen);
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INIT_TP_WR(t6req6, 0);
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req6 = (struct cpl_act_open_req6 *)t6req6;
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t5req6 = (struct cpl_t5_act_open_req6 *)t6req6;
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break;
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default:
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pr_err("T%d Chip is not supported\n",
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CHELSIO_CHIP_VERSION(adapter_type));
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ret = -EINVAL;
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goto clip_release;
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}
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OPCODE_TID(req6) = cpu_to_be32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ6,
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((ep->rss_qid<<14)|ep->atid)));
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req6->local_port = la6->sin6_port;
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req6->peer_port = ra6->sin6_port;
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req6->local_ip_hi = *((__be64 *)
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(la6->sin6_addr.s6_addr));
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req6->local_ip_lo = *((__be64 *)
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(la6->sin6_addr.s6_addr + 8));
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req6->peer_ip_hi = *((__be64 *)
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(ra6->sin6_addr.s6_addr));
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req6->peer_ip_lo = *((__be64 *)
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(ra6->sin6_addr.s6_addr + 8));
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req6->local_ip_hi = *((__be64 *)(la6->sin6_addr.s6_addr));
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req6->local_ip_lo = *((__be64 *)(la6->sin6_addr.s6_addr + 8));
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req6->peer_ip_hi = *((__be64 *)(ra6->sin6_addr.s6_addr));
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req6->peer_ip_lo = *((__be64 *)(ra6->sin6_addr.s6_addr + 8));
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req6->opt0 = cpu_to_be64(opt0);
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if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) {
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req6->params = cpu_to_be32(cxgb4_select_ntuple(
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ep->com.dev->rdev.lldi.ports[0],
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ep->l2t));
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req6->opt2 = cpu_to_be32(opt2);
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}
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} else {
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u32 isn = (prandom_u32() & ~7UL) - 1;
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if (peer2peer)
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isn += 4;
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if (ep->com.remote_addr.ss_family == AF_INET) {
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t5_req = (struct cpl_t5_act_open_req *)
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skb_put(skb, wrlen);
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INIT_TP_WR(t5_req, 0);
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OPCODE_TID(t5_req) = cpu_to_be32(
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MK_OPCODE_TID(CPL_ACT_OPEN_REQ,
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((ep->rss_qid << 14) | ep->atid)));
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t5_req->local_port = la->sin_port;
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t5_req->peer_port = ra->sin_port;
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t5_req->local_ip = la->sin_addr.s_addr;
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t5_req->peer_ip = ra->sin_addr.s_addr;
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t5_req->opt0 = cpu_to_be64(opt0);
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t5_req->params = cpu_to_be64(FILTER_TUPLE_V(
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t5req6->params = cpu_to_be64(FILTER_TUPLE_V(
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cxgb4_select_ntuple(
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ep->com.dev->rdev.lldi.ports[0],
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ep->l2t)));
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t5_req->rsvd = cpu_to_be32(isn);
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PDBG("%s snd_isn %u\n", __func__,
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be32_to_cpu(t5_req->rsvd));
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t5_req->opt2 = cpu_to_be32(opt2);
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} else {
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t5_req6 = (struct cpl_t5_act_open_req6 *)
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skb_put(skb, wrlen);
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INIT_TP_WR(t5_req6, 0);
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OPCODE_TID(t5_req6) = cpu_to_be32(
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MK_OPCODE_TID(CPL_ACT_OPEN_REQ6,
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((ep->rss_qid<<14)|ep->atid)));
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t5_req6->local_port = la6->sin6_port;
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t5_req6->peer_port = ra6->sin6_port;
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t5_req6->local_ip_hi = *((__be64 *)
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(la6->sin6_addr.s6_addr));
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t5_req6->local_ip_lo = *((__be64 *)
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(la6->sin6_addr.s6_addr + 8));
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t5_req6->peer_ip_hi = *((__be64 *)
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(ra6->sin6_addr.s6_addr));
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t5_req6->peer_ip_lo = *((__be64 *)
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(ra6->sin6_addr.s6_addr + 8));
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t5_req6->opt0 = cpu_to_be64(opt0);
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t5_req6->params = cpu_to_be64(FILTER_TUPLE_V(
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cxgb4_select_ntuple(
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ep->com.dev->rdev.lldi.ports[0],
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ep->l2t)));
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t5_req6->rsvd = cpu_to_be32(isn);
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PDBG("%s snd_isn %u\n", __func__,
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be32_to_cpu(t5_req6->rsvd));
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t5_req6->opt2 = cpu_to_be32(opt2);
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t5req6->rsvd = cpu_to_be32(isn);
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PDBG("%s snd_isn %u\n", __func__, t5req6->rsvd);
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t5req6->opt2 = cpu_to_be32(opt2);
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}
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}
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set_bit(ACT_OPEN_REQ, &ep->com.history);
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ret = c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t);
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clip_release:
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if (ret && ep->com.remote_addr.ss_family == AF_INET6)
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cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0],
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(const u32 *)&la6->sin6_addr.s6_addr, 1);
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@ -1902,7 +1928,7 @@ static void set_tcp_window(struct c4iw_ep *ep, struct port_info *pi)
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static int import_ep(struct c4iw_ep *ep, int iptype, __u8 *peer_ip,
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struct dst_entry *dst, struct c4iw_dev *cdev,
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bool clear_mpa_v1)
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bool clear_mpa_v1, enum chip_type adapter_type)
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{
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struct neighbour *n;
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int err, step;
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@ -1937,7 +1963,8 @@ static int import_ep(struct c4iw_ep *ep, int iptype, __u8 *peer_ip,
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goto out;
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ep->mtu = pdev->mtu;
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ep->tx_chan = cxgb4_port_chan(pdev);
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ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
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ep->smac_idx = cxgb4_tp_smt_idx(adapter_type,
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cxgb4_port_viid(pdev));
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step = cdev->rdev.lldi.ntxq /
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cdev->rdev.lldi.nchan;
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ep->txq_idx = cxgb4_port_idx(pdev) * step;
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@ -1956,7 +1983,8 @@ static int import_ep(struct c4iw_ep *ep, int iptype, __u8 *peer_ip,
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goto out;
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ep->mtu = dst_mtu(dst);
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ep->tx_chan = cxgb4_port_chan(pdev);
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ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
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ep->smac_idx = cxgb4_tp_smt_idx(adapter_type,
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cxgb4_port_viid(pdev));
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step = cdev->rdev.lldi.ntxq /
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cdev->rdev.lldi.nchan;
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ep->txq_idx = cxgb4_port_idx(pdev) * step;
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@ -2029,7 +2057,8 @@ static int c4iw_reconnect(struct c4iw_ep *ep)
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err = -EHOSTUNREACH;
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goto fail3;
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}
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err = import_ep(ep, iptype, ra, ep->dst, ep->com.dev, false);
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err = import_ep(ep, iptype, ra, ep->dst, ep->com.dev, false,
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ep->com.dev->rdev.lldi.adapter_type);
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if (err) {
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pr_err("%s - cannot alloc l2e.\n", __func__);
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goto fail4;
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@ -2217,13 +2246,14 @@ static void accept_cr(struct c4iw_ep *ep, struct sk_buff *skb,
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int wscale;
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struct cpl_t5_pass_accept_rpl *rpl5 = NULL;
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int win;
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enum chip_type adapter_type = ep->com.dev->rdev.lldi.adapter_type;
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PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
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BUG_ON(skb_cloned(skb));
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skb_get(skb);
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rpl = cplhdr(skb);
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if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
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if (!is_t4(adapter_type)) {
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skb_trim(skb, roundup(sizeof(*rpl5), 16));
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rpl5 = (void *)rpl;
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INIT_TP_WR(rpl5, ep->hwtid);
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@ -2270,12 +2300,16 @@ static void accept_cr(struct c4iw_ep *ep, struct sk_buff *skb,
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const struct tcphdr *tcph;
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u32 hlen = ntohl(req->hdr_len);
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if (CHELSIO_CHIP_VERSION(adapter_type) <= CHELSIO_T5)
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tcph = (const void *)(req + 1) + ETH_HDR_LEN_G(hlen) +
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IP_HDR_LEN_G(hlen);
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else
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tcph = (const void *)(req + 1) +
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T6_ETH_HDR_LEN_G(hlen) + T6_IP_HDR_LEN_G(hlen);
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if (tcph->ece && tcph->cwr)
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opt2 |= CCTRL_ECN_V(1);
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}
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if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
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if (CHELSIO_CHIP_VERSION(adapter_type) > CHELSIO_T4) {
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u32 isn = (prandom_u32() & ~7UL) - 1;
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opt2 |= T5_OPT_2_VALID_F;
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opt2 |= CONG_CNTRL_V(CONG_ALG_TAHOE);
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@ -2306,12 +2340,16 @@ static void reject_cr(struct c4iw_dev *dev, u32 hwtid, struct sk_buff *skb)
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return;
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}
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static void get_4tuple(struct cpl_pass_accept_req *req, int *iptype,
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__u8 *local_ip, __u8 *peer_ip,
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static void get_4tuple(struct cpl_pass_accept_req *req, enum chip_type type,
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int *iptype, __u8 *local_ip, __u8 *peer_ip,
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__be16 *local_port, __be16 *peer_port)
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{
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int eth_len = ETH_HDR_LEN_G(be32_to_cpu(req->hdr_len));
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int ip_len = IP_HDR_LEN_G(be32_to_cpu(req->hdr_len));
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int eth_len = (CHELSIO_CHIP_VERSION(type) <= CHELSIO_T5) ?
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ETH_HDR_LEN_G(be32_to_cpu(req->hdr_len)) :
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T6_ETH_HDR_LEN_G(be32_to_cpu(req->hdr_len));
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int ip_len = (CHELSIO_CHIP_VERSION(type) <= CHELSIO_T5) ?
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IP_HDR_LEN_G(be32_to_cpu(req->hdr_len)) :
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T6_IP_HDR_LEN_G(be32_to_cpu(req->hdr_len));
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struct iphdr *ip = (struct iphdr *)((u8 *)(req + 1) + eth_len);
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struct ipv6hdr *ip6 = (struct ipv6hdr *)((u8 *)(req + 1) + eth_len);
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struct tcphdr *tcp = (struct tcphdr *)
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@ -2366,7 +2404,8 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
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goto reject;
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}
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get_4tuple(req, &iptype, local_ip, peer_ip, &local_port, &peer_port);
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get_4tuple(req, parent_ep->com.dev->rdev.lldi.adapter_type, &iptype,
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||||
local_ip, peer_ip, &local_port, &peer_port);
|
||||
|
||||
/* Find output route */
|
||||
if (iptype == 4) {
|
||||
@ -2401,7 +2440,8 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
|
||||
goto reject;
|
||||
}
|
||||
|
||||
err = import_ep(child_ep, iptype, peer_ip, dst, dev, false);
|
||||
err = import_ep(child_ep, iptype, peer_ip, dst, dev, false,
|
||||
parent_ep->com.dev->rdev.lldi.adapter_type);
|
||||
if (err) {
|
||||
printk(KERN_ERR MOD "%s - failed to allocate l2t entry!\n",
|
||||
__func__);
|
||||
@ -3193,7 +3233,8 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
|
||||
goto fail2;
|
||||
}
|
||||
|
||||
err = import_ep(ep, iptype, ra, ep->dst, ep->com.dev, true);
|
||||
err = import_ep(ep, iptype, ra, ep->dst, ep->com.dev, true,
|
||||
ep->com.dev->rdev.lldi.adapter_type);
|
||||
if (err) {
|
||||
printk(KERN_ERR MOD "%s - cannot alloc l2e.\n", __func__);
|
||||
goto fail3;
|
||||
@ -3601,20 +3642,23 @@ static int deferred_fw6_msg(struct c4iw_dev *dev, struct sk_buff *skb)
|
||||
|
||||
static void build_cpl_pass_accept_req(struct sk_buff *skb, int stid , u8 tos)
|
||||
{
|
||||
u32 l2info;
|
||||
u16 vlantag, len, hdr_len, eth_hdr_len;
|
||||
__be32 l2info;
|
||||
__be16 hdr_len, vlantag, len;
|
||||
u16 eth_hdr_len;
|
||||
int tcp_hdr_len, ip_hdr_len;
|
||||
u8 intf;
|
||||
struct cpl_rx_pkt *cpl = cplhdr(skb);
|
||||
struct cpl_pass_accept_req *req;
|
||||
struct tcp_options_received tmp_opt;
|
||||
struct c4iw_dev *dev;
|
||||
enum chip_type type;
|
||||
|
||||
dev = *((struct c4iw_dev **) (skb->cb + sizeof(void *)));
|
||||
/* Store values from cpl_rx_pkt in temporary location. */
|
||||
vlantag = (__force u16) cpl->vlan;
|
||||
len = (__force u16) cpl->len;
|
||||
l2info = (__force u32) cpl->l2info;
|
||||
hdr_len = (__force u16) cpl->hdr_len;
|
||||
vlantag = cpl->vlan;
|
||||
len = cpl->len;
|
||||
l2info = cpl->l2info;
|
||||
hdr_len = cpl->hdr_len;
|
||||
intf = cpl->iff;
|
||||
|
||||
__skb_pull(skb, sizeof(*req) + sizeof(struct rss_header));
|
||||
@ -3631,20 +3675,28 @@ static void build_cpl_pass_accept_req(struct sk_buff *skb, int stid , u8 tos)
|
||||
memset(req, 0, sizeof(*req));
|
||||
req->l2info = cpu_to_be16(SYN_INTF_V(intf) |
|
||||
SYN_MAC_IDX_V(RX_MACIDX_G(
|
||||
(__force int) htonl(l2info))) |
|
||||
be32_to_cpu(l2info))) |
|
||||
SYN_XACT_MATCH_F);
|
||||
eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
|
||||
RX_ETHHDR_LEN_G((__force int)htonl(l2info)) :
|
||||
RX_T5_ETHHDR_LEN_G((__force int)htonl(l2info));
|
||||
req->hdr_len = cpu_to_be32(SYN_RX_CHAN_V(RX_CHAN_G(
|
||||
(__force int) htonl(l2info))) |
|
||||
TCP_HDR_LEN_V(RX_TCPHDR_LEN_G(
|
||||
(__force int) htons(hdr_len))) |
|
||||
IP_HDR_LEN_V(RX_IPHDR_LEN_G(
|
||||
(__force int) htons(hdr_len))) |
|
||||
ETH_HDR_LEN_V(RX_ETHHDR_LEN_G(eth_hdr_len)));
|
||||
req->vlan = (__force __be16) vlantag;
|
||||
req->len = (__force __be16) len;
|
||||
type = dev->rdev.lldi.adapter_type;
|
||||
tcp_hdr_len = RX_TCPHDR_LEN_G(be16_to_cpu(hdr_len));
|
||||
ip_hdr_len = RX_IPHDR_LEN_G(be16_to_cpu(hdr_len));
|
||||
req->hdr_len =
|
||||
cpu_to_be32(SYN_RX_CHAN_V(RX_CHAN_G(be32_to_cpu(l2info))));
|
||||
if (CHELSIO_CHIP_VERSION(type) <= CHELSIO_T5) {
|
||||
eth_hdr_len = is_t4(type) ?
|
||||
RX_ETHHDR_LEN_G(be32_to_cpu(l2info)) :
|
||||
RX_T5_ETHHDR_LEN_G(be32_to_cpu(l2info));
|
||||
req->hdr_len |= cpu_to_be32(TCP_HDR_LEN_V(tcp_hdr_len) |
|
||||
IP_HDR_LEN_V(ip_hdr_len) |
|
||||
ETH_HDR_LEN_V(eth_hdr_len));
|
||||
} else { /* T6 and later */
|
||||
eth_hdr_len = RX_T6_ETHHDR_LEN_G(be32_to_cpu(l2info));
|
||||
req->hdr_len |= cpu_to_be32(T6_TCP_HDR_LEN_V(tcp_hdr_len) |
|
||||
T6_IP_HDR_LEN_V(ip_hdr_len) |
|
||||
T6_ETH_HDR_LEN_V(eth_hdr_len));
|
||||
}
|
||||
req->vlan = vlantag;
|
||||
req->len = len;
|
||||
req->tos_stid = cpu_to_be32(PASS_OPEN_TID_V(stid) |
|
||||
PASS_OPEN_TOS_V(tos));
|
||||
req->tcpopt.mss = htons(tmp_opt.mss_clamp);
|
||||
@ -3763,9 +3815,22 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb)
|
||||
goto reject;
|
||||
}
|
||||
|
||||
eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
|
||||
RX_ETHHDR_LEN_G(htonl(cpl->l2info)) :
|
||||
RX_T5_ETHHDR_LEN_G(htonl(cpl->l2info));
|
||||
switch (CHELSIO_CHIP_VERSION(dev->rdev.lldi.adapter_type)) {
|
||||
case CHELSIO_T4:
|
||||
eth_hdr_len = RX_ETHHDR_LEN_G(be32_to_cpu(cpl->l2info));
|
||||
break;
|
||||
case CHELSIO_T5:
|
||||
eth_hdr_len = RX_T5_ETHHDR_LEN_G(be32_to_cpu(cpl->l2info));
|
||||
break;
|
||||
case CHELSIO_T6:
|
||||
eth_hdr_len = RX_T6_ETHHDR_LEN_G(be32_to_cpu(cpl->l2info));
|
||||
break;
|
||||
default:
|
||||
pr_err("T%d Chip is not supported\n",
|
||||
CHELSIO_CHIP_VERSION(dev->rdev.lldi.adapter_type));
|
||||
goto reject;
|
||||
}
|
||||
|
||||
if (eth_hdr_len == ETH_HLEN) {
|
||||
eh = (struct ethhdr *)(req + 1);
|
||||
iph = (struct iphdr *)(eh + 1);
|
||||
|
@ -962,12 +962,12 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
|
||||
devp->rdev.lldi.sge_egrstatuspagesize;
|
||||
|
||||
/*
|
||||
* For T5 devices, we map all of BAR2 with WC.
|
||||
* For T5/T6 devices, we map all of BAR2 with WC.
|
||||
* For T4 devices with onchip qp mem, we map only that part
|
||||
* of BAR2 with WC.
|
||||
*/
|
||||
devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
|
||||
if (is_t5(devp->rdev.lldi.adapter_type)) {
|
||||
if (!is_t4(devp->rdev.lldi.adapter_type)) {
|
||||
devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
|
||||
pci_resource_len(devp->rdev.lldi.pdev, 2));
|
||||
if (!devp->rdev.bar2_kva) {
|
||||
@ -1267,11 +1267,9 @@ static int enable_qp_db(int id, void *p, void *data)
|
||||
static void resume_rc_qp(struct c4iw_qp *qp)
|
||||
{
|
||||
spin_lock(&qp->lock);
|
||||
t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc,
|
||||
is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
|
||||
t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc, NULL);
|
||||
qp->wq.sq.wq_pidx_inc = 0;
|
||||
t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc,
|
||||
is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
|
||||
t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc, NULL);
|
||||
qp->wq.rq.wq_pidx_inc = 0;
|
||||
spin_unlock(&qp->lock);
|
||||
}
|
||||
|
@ -209,7 +209,7 @@ static int c4iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
|
||||
if (addr >= rdev->oc_mw_pa)
|
||||
vma->vm_page_prot = t4_pgprot_wc(vma->vm_page_prot);
|
||||
else {
|
||||
if (is_t5(rdev->lldi.adapter_type))
|
||||
if (!is_t4(rdev->lldi.adapter_type))
|
||||
vma->vm_page_prot =
|
||||
t4_pgprot_wc(vma->vm_page_prot);
|
||||
else
|
||||
|
@ -712,8 +712,7 @@ static int ring_kernel_sq_db(struct c4iw_qp *qhp, u16 inc)
|
||||
spin_lock_irqsave(&qhp->rhp->lock, flags);
|
||||
spin_lock(&qhp->lock);
|
||||
if (qhp->rhp->db_state == NORMAL)
|
||||
t4_ring_sq_db(&qhp->wq, inc,
|
||||
is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
|
||||
t4_ring_sq_db(&qhp->wq, inc, NULL);
|
||||
else {
|
||||
add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
|
||||
qhp->wq.sq.wq_pidx_inc += inc;
|
||||
@ -730,8 +729,7 @@ static int ring_kernel_rq_db(struct c4iw_qp *qhp, u16 inc)
|
||||
spin_lock_irqsave(&qhp->rhp->lock, flags);
|
||||
spin_lock(&qhp->lock);
|
||||
if (qhp->rhp->db_state == NORMAL)
|
||||
t4_ring_rq_db(&qhp->wq, inc,
|
||||
is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
|
||||
t4_ring_rq_db(&qhp->wq, inc, NULL);
|
||||
else {
|
||||
add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
|
||||
qhp->wq.rq.wq_pidx_inc += inc;
|
||||
@ -817,7 +815,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
|
||||
fw_opcode = FW_RI_FR_NSMR_WR;
|
||||
swsqe->opcode = FW_RI_FAST_REGISTER;
|
||||
err = build_fastreg(&qhp->wq.sq, wqe, wr, &len16,
|
||||
is_t5(
|
||||
!is_t4(
|
||||
qhp->rhp->rdev.lldi.adapter_type) ?
|
||||
1 : 0);
|
||||
break;
|
||||
@ -860,8 +858,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
|
||||
idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE);
|
||||
}
|
||||
if (!qhp->rhp->rdev.status_page->db_off) {
|
||||
t4_ring_sq_db(&qhp->wq, idx,
|
||||
is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
|
||||
t4_ring_sq_db(&qhp->wq, idx, wqe);
|
||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||
} else {
|
||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||
@ -934,8 +931,7 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
|
||||
num_wrs--;
|
||||
}
|
||||
if (!qhp->rhp->rdev.status_page->db_off) {
|
||||
t4_ring_rq_db(&qhp->wq, idx,
|
||||
is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
|
||||
t4_ring_rq_db(&qhp->wq, idx, wqe);
|
||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||
} else {
|
||||
spin_unlock_irqrestore(&qhp->lock, flag);
|
||||
@ -1875,7 +1871,7 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
||||
attrs.rq_db_inc = attr->rq_psn;
|
||||
mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0;
|
||||
mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0;
|
||||
if (is_t5(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) &&
|
||||
if (!is_t4(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) &&
|
||||
(mask & (C4IW_QP_ATTR_SQ_DB|C4IW_QP_ATTR_RQ_DB)))
|
||||
return -EINVAL;
|
||||
|
||||
|
@ -455,8 +455,7 @@ static inline void pio_copy(u64 __iomem *dst, u64 *src)
|
||||
}
|
||||
}
|
||||
|
||||
static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5,
|
||||
union t4_wr *wqe)
|
||||
static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, union t4_wr *wqe)
|
||||
{
|
||||
|
||||
/* Flush host queue memory writes. */
|
||||
@ -482,7 +481,7 @@ static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5,
|
||||
writel(QID_V(wq->sq.qid) | PIDX_V(inc), wq->db);
|
||||
}
|
||||
|
||||
static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t5,
|
||||
static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc,
|
||||
union t4_recv_wr *wqe)
|
||||
{
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user