PCI: Fix typos and whitespace errors
Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
@@ -25,7 +25,7 @@ config PCI_DRA7XX
|
||||
work either as EP or RC. In order to enable host-specific features
|
||||
PCI_DRA7XX_HOST must be selected and in order to enable device-
|
||||
specific features PCI_DRA7XX_EP must be selected. This uses
|
||||
the Designware core.
|
||||
the DesignWare core.
|
||||
|
||||
if PCI_DRA7XX
|
||||
|
||||
@@ -97,8 +97,8 @@ config PCI_KEYSTONE
|
||||
select PCIE_DW_HOST
|
||||
help
|
||||
Say Y here if you want to enable PCI controller support on Keystone
|
||||
SoCs. The PCI controller on Keystone is based on Designware hardware
|
||||
and therefore the driver re-uses the Designware core functions to
|
||||
SoCs. The PCI controller on Keystone is based on DesignWare hardware
|
||||
and therefore the driver re-uses the DesignWare core functions to
|
||||
implement the driver.
|
||||
|
||||
config PCI_LAYERSCAPE
|
||||
@@ -132,7 +132,7 @@ config PCIE_QCOM
|
||||
select PCIE_DW_HOST
|
||||
help
|
||||
Say Y here to enable PCIe controller support on Qualcomm SoCs. The
|
||||
PCIe controller uses the Designware core plus Qualcomm-specific
|
||||
PCIe controller uses the DesignWare core plus Qualcomm-specific
|
||||
hardware wrappers.
|
||||
|
||||
config PCIE_ARMADA_8K
|
||||
@@ -145,8 +145,8 @@ config PCIE_ARMADA_8K
|
||||
help
|
||||
Say Y here if you want to enable PCIe controller support on
|
||||
Armada-8K SoCs. The PCIe controller on Armada-8K is based on
|
||||
Designware hardware and therefore the driver re-uses the
|
||||
Designware core functions to implement the driver.
|
||||
DesignWare hardware and therefore the driver re-uses the
|
||||
DesignWare core functions to implement the driver.
|
||||
|
||||
config PCIE_ARTPEC6
|
||||
bool "Axis ARTPEC-6 PCIe controller"
|
||||
|
||||
@@ -275,7 +275,6 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
||||
static irqreturn_t dra7xx_pcie_irq_handler(int irq, void *arg)
|
||||
{
|
||||
struct dra7xx_pcie *dra7xx = arg;
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Designware application register space functions for Keystone PCI controller
|
||||
* DesignWare application register space functions for Keystone PCI controller
|
||||
*
|
||||
* Copyright (C) 2013-2014 Texas Instruments., Ltd.
|
||||
* http://www.ti.com
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/**
|
||||
* Synopsys Designware PCIe Endpoint controller driver
|
||||
* Synopsys DesignWare PCIe Endpoint controller driver
|
||||
*
|
||||
* Copyright (C) 2017 Texas Instruments
|
||||
* Author: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Synopsys Designware PCIe host controller driver
|
||||
* Synopsys DesignWare PCIe host controller driver
|
||||
*
|
||||
* Copyright (C) 2013 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Synopsys Designware PCIe host controller driver
|
||||
* Synopsys DesignWare PCIe host controller driver
|
||||
*
|
||||
* Copyright (C) 2013 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Synopsys Designware PCIe host controller driver
|
||||
* Synopsys DesignWare PCIe host controller driver
|
||||
*
|
||||
* Copyright (C) 2013 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
|
||||
Reference in New Issue
Block a user