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e1000e: fix logical error in flush_desc_rings

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The condition under which the flush should occur was reversed.  The fix
should be applied before any HW reset (unless followed by bus reset)
and before any power state transition from D0.

If E1000_FEXTNVM7_NEED_DESCRING_FLUSH bit is set in FEXTNVM7 and TDLEN > 0
the Tx ring should be flushed. (fixes ~95% of the hang states).
If the E1000_FEXTNVM7_NEED_DESCRING_FLUSH did not clear, we should also
flush the RX ring. Bug was caught by Alexander Duyck during a code review
when examining this fix.

Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Yanir Lubetkin 2015-04-22 19:25:17 +03:00 committed by Jeff Kirsher
parent bfc9473bf9
commit 95f0d95046
1 changed files with 1 additions and 1 deletions
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2
drivers/net/ethernet/intel/e1000e/netdev.c
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@ -3878,7 +3878,7 @@ static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
/* do nothing if we're not in faulty state, or if the queue is empty */
tdlen = er32(TDLEN(0));
hang_state = er32(FEXTNVM7);
if ((hang_state & E1000_FEXTNVM7_NEED_DESCRING_FLUSH) || tdlen)
if (!(hang_state & E1000_FEXTNVM7_NEED_DESCRING_FLUSH) || !tdlen)
return;
e1000_flush_tx_ring(adapter);
/* recheck, maybe the fault is caused by the rx ring */