forked from Minki/linux
MMC core:
- Fix/restore behaviour when selecting bus width for (e)MMC MMC host: - sunxi: Fix eMMC HS-DDR modes on Allwinner A80 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXUTJjAAoJEP4mhCVzWIwpggoQAJQQlp0nrI9HUIFE+A6K/+Vo ID/7ss1x3QiJ0reMiMA6ndDVSdneHMET2wDxfAu0qrRzBaUMUhzpCmWtc6mAsY52 Fm5xj/KQD106ExexO3YHTFBZ6qfkq4YiO2tyUiXLDT6W55Y128JD9oFPk0Qy8YfJ DLXHrkQiHsyjiQ1lcE7xN4wAUyHQZ0S4cHpx3kqaOOYfHwkE2qQTAzriJTQiO1u+ Z4W50LETOI2TbbP/RSaWa/xwH+nEySi4tawfENTpwnE4BDG+2sTX57ZcVEVbkumB UmRPuIgNuy/J3DNxdeq8ekB4aiWL2hy9xDgiqT52UvbY4GmzckIA+eIZLyHIGlP5 1BFnoUPimgXZpJBrrR/xcghukR21ZSug6ck9qkh/qQGlbUgDOkSuMAzZ30JYYtpO k9/qUzup264aXqZbWCoLAzT6Cjotvy5H4qzb+xINNrrpWl2IBUhkqNb4tb59mMCf k3NrJ8QjmAvUrL917y7kszPkffPSTs2nO72s0SHymgKWPyTXYcS0xAQ0oCmmUD7W ZcexdQRW8xN3KhEilF5v/tDnrXMAtgMt+PdkLHrpfXqatk1kRDi0QrpI7OTFUAwf R1nM2wM/PsBZh+i+eWPNSF+B7CSS99L+1jFXfE2rIpwB8y6ZHoJfC0W8Pk+fCxze CUxR84sk8270DaO5eOVf =e7+p -----END PGP SIGNATURE----- Merge tag 'mmc-v4.7-rc1-2' of git://git.linaro.org/people/ulf.hansson/mmc Pull MMC fixes from Ulf Hansson: "MMC core: - Fix/restore behaviour when selecting bus width for (e)MMC MMC host: - sunxi: Fix eMMC HS-DDR modes on Allwinner A80" * tag 'mmc-v4.7-rc1-2' of git://git.linaro.org/people/ulf.hansson/mmc: mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 mmc: sunxi: Fix DDR MMC timings for A80 mmc: fix mmc mode selection for HS-DDR and higher
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commit
95b46aeb05
@ -1276,7 +1276,7 @@ static int mmc_select_hs200(struct mmc_card *card)
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* switch to HS200 mode if bus width is set successfully.
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*/
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err = mmc_select_bus_width(card);
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if (!err) {
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if (err >= 0) {
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val = EXT_CSD_TIMING_HS200 |
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card->drive_strength << EXT_CSD_DRV_STR_SHIFT;
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err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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@ -1583,7 +1583,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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} else if (mmc_card_hs(card)) {
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/* Select the desired bus width optionally */
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err = mmc_select_bus_width(card);
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if (!err) {
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if (err >= 0) {
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err = mmc_select_hs_ddr(card);
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if (err)
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goto free_card;
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@ -970,8 +970,8 @@ static const struct sunxi_mmc_clk_delay sun9i_mmc_clk_delays[] = {
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[SDXC_CLK_400K] = { .output = 180, .sample = 180 },
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[SDXC_CLK_25M] = { .output = 180, .sample = 75 },
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[SDXC_CLK_50M] = { .output = 150, .sample = 120 },
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[SDXC_CLK_50M_DDR] = { .output = 90, .sample = 120 },
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[SDXC_CLK_50M_DDR_8BIT] = { .output = 90, .sample = 120 },
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[SDXC_CLK_50M_DDR] = { .output = 54, .sample = 36 },
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[SDXC_CLK_50M_DDR_8BIT] = { .output = 72, .sample = 72 },
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};
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static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
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@ -1129,11 +1129,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
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MMC_CAP_1_8V_DDR |
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MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
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/* TODO MMC DDR is not working on A80 */
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if (of_device_is_compatible(pdev->dev.of_node,
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"allwinner,sun9i-a80-mmc"))
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mmc->caps &= ~MMC_CAP_1_8V_DDR;
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ret = mmc_of_parse(mmc);
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if (ret)
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goto error_free_dma;
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