drm/amdgpu/sdma5: set clock gating for navi14
same as navi10. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1493,6 +1493,7 @@ static int sdma_v5_0_set_clockgating_state(void *handle,
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switch (adev->asic_type) {
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case CHIP_NAVI10:
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case CHIP_NAVI14:
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sdma_v5_0_update_medium_grain_clock_gating(adev,
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state == AMD_CG_STATE_GATE ? true : false);
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sdma_v5_0_update_medium_grain_light_sleep(adev,
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