drm/amdgpu: Use asic specific doorbell index instead of macro definition
ASIC specific doorbell layout is used instead of enum definition Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -181,25 +181,14 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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* process in case of 64-bit doorbells so we
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* can use each doorbell assignment twice.
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*/
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if (adev->asic_type == CHIP_VEGA10) {
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gpu_resources.sdma_doorbell[0][i] =
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AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
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gpu_resources.sdma_doorbell[0][i+1] =
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AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i] =
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AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i+1] =
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AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
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} else {
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gpu_resources.sdma_doorbell[0][i] =
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AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
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gpu_resources.sdma_doorbell[0][i+1] =
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AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i] =
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AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i+1] =
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AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
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}
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gpu_resources.sdma_doorbell[0][i] =
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adev->doorbell_index.sdma_engine0 + (i >> 1);
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gpu_resources.sdma_doorbell[0][i+1] =
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adev->doorbell_index.sdma_engine0 + 0x200 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i] =
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adev->doorbell_index.sdma_engine1 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i+1] =
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adev->doorbell_index.sdma_engine1 + 0x200 + (i >> 1);
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}
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/* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
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* SDMA, IH and VCN. So don't use them for the CP.
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@ -532,7 +532,7 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
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adev->doorbell.size = pci_resource_len(adev->pdev, 2);
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adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32),
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AMDGPU_DOORBELL_MAX_ASSIGNMENT+1);
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adev->doorbell_index.max_assignment+1);
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if (adev->doorbell.num_doorbells == 0)
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return -EINVAL;
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@ -250,7 +250,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev,
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ring->adev = NULL;
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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ring->doorbell_index = AMDGPU_DOORBELL_KIQ;
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ring->doorbell_index = adev->doorbell_index.kiq;
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r = amdgpu_gfx_kiq_acquire(adev, ring);
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if (r)
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@ -4363,7 +4363,7 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
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ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
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sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
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irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
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@ -1890,7 +1890,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
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ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id;
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ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
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+ (ring_id * GFX8_MEC_HPD_SIZE);
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sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
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@ -2001,7 +2001,7 @@ static int gfx_v8_0_sw_init(void *handle)
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/* no gfx doorbells on iceland */
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if (adev->asic_type != CHIP_TOPAZ) {
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ring->use_doorbell = true;
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ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0;
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ring->doorbell_index = adev->doorbell_index.gfx_ring0;
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}
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r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq,
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@ -4215,7 +4215,7 @@ static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu
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tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER,
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DOORBELL_RANGE_LOWER,
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AMDGPU_DOORBELL_GFX_RING0);
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adev->doorbell_index.gfx_ring0);
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WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp);
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WREG32(mmCP_RB_DOORBELL_RANGE_UPPER,
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@ -4644,8 +4644,8 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring)
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static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev)
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{
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if (adev->asic_type > CHIP_TONGA) {
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WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
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WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
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WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2);
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WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2);
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}
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/* enable doorbells */
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WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
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@ -1566,7 +1566,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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ring->doorbell_index = (AMDGPU_DOORBELL64_MEC_RING0 + ring_id) << 1;
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ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1;
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ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
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+ (ring_id * GFX9_MEC_HPD_SIZE);
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sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
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@ -1655,7 +1655,7 @@ static int gfx_v9_0_sw_init(void *handle)
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else
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sprintf(ring->name, "gfx_%d", i);
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ring->use_doorbell = true;
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ring->doorbell_index = AMDGPU_DOORBELL64_GFX_RING0 << 1;
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ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1;
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r = amdgpu_ring_init(adev, ring, 1024,
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&adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
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if (r)
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@ -2981,9 +2981,9 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
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/* enable the doorbell if requested */
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if (ring->use_doorbell) {
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
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(AMDGPU_DOORBELL64_KIQ *2) << 2);
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(adev->doorbell_index.kiq * 2) << 2);
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
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(AMDGPU_DOORBELL64_USERQUEUE_END * 2) << 2);
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(adev->doorbell_index.userqueue_end * 2) << 2);
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}
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WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
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@ -1146,7 +1146,7 @@ static int sdma_v3_0_sw_init(void *handle)
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if (!amdgpu_sriov_vf(adev)) {
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ring->use_doorbell = true;
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ring->doorbell_index = (i == 0) ?
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AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1;
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adev->doorbell_index.sdma_engine0 : adev->doorbell_index.sdma_engine1;
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} else {
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ring->use_pollmem = true;
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}
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@ -1518,15 +1518,13 @@ static int sdma_v4_0_sw_init(void *handle)
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ring->ring_obj = NULL;
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ring->use_doorbell = true;
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DRM_INFO("use_doorbell being set to: [%s]\n",
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ring->use_doorbell?"true":"false");
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/* doorbell size is 2 dwords, get DWORD offset */
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if (adev->asic_type == CHIP_VEGA10)
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ring->doorbell_index = (i == 0) ?
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(AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1)
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: (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1);
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else
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ring->doorbell_index = (i == 0) ?
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(AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1)
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: (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1);
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ring->doorbell_index = (i == 0) ?
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(adev->doorbell_index.sdma_engine0 << 1)
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: (adev->doorbell_index.sdma_engine1 << 1);
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sprintf(ring->name, "sdma%d", i);
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r = amdgpu_ring_init(adev, ring, 1024,
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@ -1545,14 +1543,9 @@ static int sdma_v4_0_sw_init(void *handle)
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/* paging queue use same doorbell index/routing as gfx queue
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* with 0x400 (4096 dwords) offset on second doorbell page
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*/
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if (adev->asic_type == CHIP_VEGA10)
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ring->doorbell_index = (i == 0) ?
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(AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 << 1)
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: (AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 << 1);
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else
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ring->doorbell_index = (i == 0) ?
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(AMDGPU_DOORBELL64_sDMA_ENGINE0 << 1)
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: (AMDGPU_DOORBELL64_sDMA_ENGINE1 << 1);
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ring->doorbell_index = (i == 0) ?
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(adev->doorbell_index.sdma_engine0 << 1)
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: (adev->doorbell_index.sdma_engine1 << 1);
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ring->doorbell_index += 0x400;
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sprintf(ring->name, "page%d", i);
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@ -322,7 +322,7 @@ static int tonga_ih_sw_init(void *handle)
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return r;
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adev->irq.ih.use_doorbell = true;
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adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH;
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adev->irq.ih.doorbell_index = adev->doorbell_index.ih;
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r = amdgpu_irq_init(adev);
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@ -455,9 +455,9 @@ static int uvd_v7_0_sw_init(void *handle)
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* sriov, so set unused location for other unused rings.
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*/
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if (i == 0)
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ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2;
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ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2;
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else
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ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1;
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ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1;
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}
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r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0);
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if (r)
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@ -466,9 +466,9 @@ static int vce_v4_0_sw_init(void *handle)
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* so set unused location for other unused rings.
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*/
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if (i == 0)
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ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2;
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ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2;
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else
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ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1;
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ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1;
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}
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r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0);
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if (r)
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@ -385,7 +385,7 @@ static int vega10_ih_sw_init(void *handle)
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return r;
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adev->irq.ih.use_doorbell = true;
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adev->irq.ih.doorbell_index = AMDGPU_DOORBELL64_IH << 1;
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adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
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r = amdgpu_irq_init(adev);
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