iwlwifi: pcie: Control access to the NIC's PM registers via iwl_cfg
Allow a cleaner way to access those hw-dependent registers, instead of using the product family type etc. Signed-off-by: Avri Altman <avri.altman@intel.com> Reviewed-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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@ -163,7 +163,8 @@ static const struct iwl_tt_params iwl8000_tt_params = {
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.smem_len = IWL8260_SMEM_LEN, \
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.default_nvm_file_B_step = DEFAULT_NVM_FILE_FAMILY_8000B, \
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.default_nvm_file_C_step = DEFAULT_NVM_FILE_FAMILY_8000C, \
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.thermal_params = &iwl8000_tt_params
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.thermal_params = &iwl8000_tt_params, \
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.apmg_not_supported = true
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const struct iwl_cfg iwl8260_2n_cfg = {
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.name = "Intel(R) Dual Band Wireless N 8260",
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@ -360,6 +360,7 @@ struct iwl_cfg {
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const u32 smem_offset;
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const u32 smem_len;
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const struct iwl_tt_params *thermal_params;
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bool apmg_not_supported;
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};
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/*
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@ -194,7 +194,7 @@ static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
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* (PCIe power is lost before PERST# is asserted), causing ME FW
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* to lose ownership and not being able to obtain it back.
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*/
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if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
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if (!mvm->trans->cfg->apmg_not_supported)
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iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
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~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
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@ -775,6 +775,7 @@ static void iwl_pcie_irq_handle_error(struct iwl_trans *trans)
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/* W/A for WiFi/WiMAX coex and WiMAX own the RF */
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if (trans->cfg->internal_wimax_coex &&
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!trans->cfg->apmg_not_supported &&
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(!(iwl_read_prph(trans, APMG_CLK_CTRL_REG) &
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APMS_CLK_VAL_MRB_FUNC_MODE) ||
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(iwl_read_prph(trans, APMG_PS_CTRL_REG) &
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@ -182,6 +182,9 @@ static void iwl_trans_pcie_write_shr(struct iwl_trans *trans, u32 reg, u32 val)
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static void iwl_pcie_set_pwr(struct iwl_trans *trans, bool vaux)
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{
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if (!trans->cfg->apmg_not_supported)
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return;
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if (vaux && pci_pme_capable(to_pci_dev(trans->dev), PCI_D3cold))
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iwl_set_bits_mask_prph(trans, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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@ -315,7 +318,7 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
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* bits do not disable clocks. This preserves any hardware
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* bits already set by default in "CLK_CTRL_REG" after reset.
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*/
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
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if (!trans->cfg->apmg_not_supported) {
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iwl_write_prph(trans, APMG_CLK_EN_REG,
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APMG_CLK_VAL_DMA_CLK_RQT);
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udelay(20);
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@ -515,8 +518,7 @@ static int iwl_pcie_nic_init(struct iwl_trans *trans)
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spin_unlock(&trans_pcie->irq_lock);
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
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iwl_pcie_set_pwr(trans, false);
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iwl_pcie_set_pwr(trans, false);
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iwl_op_mode_nic_config(trans->op_mode);
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@ -1063,7 +1065,7 @@ static void iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
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iwl_pcie_rx_stop(trans);
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/* Power-down device's busmaster DMA clocks */
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
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if (!trans->cfg->apmg_not_supported) {
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iwl_write_prph(trans, APMG_CLK_DIS_REG,
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APMG_CLK_VAL_DMA_CLK_RQT);
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udelay(5);
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@ -1160,8 +1162,7 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test)
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*/
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iwl_trans_pcie_tx_reset(trans);
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
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iwl_pcie_set_pwr(trans, true);
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iwl_pcie_set_pwr(trans, true);
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}
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static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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@ -1199,8 +1200,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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return ret;
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}
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if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
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iwl_pcie_set_pwr(trans, false);
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iwl_pcie_set_pwr(trans, false);
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iwl_trans_pcie_tx_reset(trans);
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