KVM: arm64: Add support for stage-2 cache flushing in generic page-table
Add support for cache flushing a range of the stage-2 address space to the generic page-table code. Signed-off-by: Quentin Perret <qperret@google.com> Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Cc: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200911132529.19844-15-will@kernel.org
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Marc Zyngier
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cc38d61cac
commit
93c66b40d7
@@ -248,6 +248,21 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr);
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*/
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bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr);
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/**
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* kvm_pgtable_stage2_flush_range() - Clean and invalidate data cache to Point
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* of Coherency for guest stage-2 address
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* range.
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* @pgt: Page-table structure initialised by kvm_pgtable_stage2_init().
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* @addr: Intermediate physical address from which to flush.
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* @size: Size of the range.
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*
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* The offset of @addr within a page is ignored and @size is rounded-up to
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* the next page boundary.
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*
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* Return: 0 on success, negative error code on failure.
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*/
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int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size);
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/**
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* kvm_pgtable_walk() - Walk a page-table.
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* @pgt: Page-table structure initialised by kvm_pgtable_*_init().
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