KVM: SVM: Drop AVIC's intermediate avic_set_running() helper
Drop avic_set_running() in favor of calling avic_vcpu_{load,put}() directly, and modify the block+put path to use preempt_disable/enable() instead of get/put_cpu(), as it doesn't actually care about the current pCPU associated with the vCPU. Opportunistically add lockdep assertions as being preempted in avic_vcpu_put() would lead to consuming stale data, even though doing so _in the current code base_ would not be fatal. Add a much needed comment explaining why svm_vcpu_blocking() needs to unload the AVIC and update the IRTE _before_ the vCPU starts blocking. Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20211208015236.1616697-22-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -978,6 +978,8 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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int h_physical_id = kvm_cpu_get_apicid(cpu);
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int h_physical_id = kvm_cpu_get_apicid(cpu);
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vcpu_svm *svm = to_svm(vcpu);
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lockdep_assert_preemption_disabled();
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/*
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/*
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* Since the host physical APIC id is 8 bits,
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* Since the host physical APIC id is 8 bits,
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* we can support host APIC ID upto 255.
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* we can support host APIC ID upto 255.
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@ -1011,6 +1013,8 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu)
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u64 entry;
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u64 entry;
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vcpu_svm *svm = to_svm(vcpu);
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lockdep_assert_preemption_disabled();
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entry = READ_ONCE(*(svm->avic_physical_id_cache));
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entry = READ_ONCE(*(svm->avic_physical_id_cache));
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/* Nothing to do if IsRunning == '0' due to vCPU blocking. */
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/* Nothing to do if IsRunning == '0' due to vCPU blocking. */
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@ -1023,30 +1027,42 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu)
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WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
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WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
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}
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}
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/*
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* This function is called during VCPU halt/unhalt.
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*/
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static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
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{
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int cpu = get_cpu();
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WARN_ON(cpu != vcpu->cpu);
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if (kvm_vcpu_apicv_active(vcpu)) {
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if (is_run)
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avic_vcpu_load(vcpu, cpu);
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else
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avic_vcpu_put(vcpu);
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}
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put_cpu();
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}
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void svm_vcpu_blocking(struct kvm_vcpu *vcpu)
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void svm_vcpu_blocking(struct kvm_vcpu *vcpu)
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{
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{
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avic_set_running(vcpu, false);
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if (!kvm_vcpu_apicv_active(vcpu))
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return;
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preempt_disable();
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/*
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* Unload the AVIC when the vCPU is about to block, _before_
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* the vCPU actually blocks.
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*
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* Any IRQs that arrive before IsRunning=0 will not cause an
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* incomplete IPI vmexit on the source, therefore vIRR will also
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* be checked by kvm_vcpu_check_block() before blocking. The
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* memory barrier implicit in set_current_state orders writing
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* IsRunning=0 before reading the vIRR. The processor needs a
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* matching memory barrier on interrupt delivery between writing
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* IRR and reading IsRunning; the lack of this barrier might be
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* the cause of errata #1235).
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*/
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avic_vcpu_put(vcpu);
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preempt_enable();
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}
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}
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void svm_vcpu_unblocking(struct kvm_vcpu *vcpu)
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void svm_vcpu_unblocking(struct kvm_vcpu *vcpu)
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{
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{
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avic_set_running(vcpu, true);
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int cpu;
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if (!kvm_vcpu_apicv_active(vcpu))
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return;
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cpu = get_cpu();
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WARN_ON(cpu != vcpu->cpu);
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avic_vcpu_load(vcpu, cpu);
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put_cpu();
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}
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}
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