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regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting

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DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register.
WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0.
Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Axel Lin 2012-03-23 06:27:10 +08:00 committed by Mark Brown
parent eb4168158f
commit 9300928692
1 changed files with 6 additions and 6 deletions
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12
drivers/regulator/wm8350-regulator.c
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@ -575,13 +575,13 @@ static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK; & ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
WM8350_DC2_HIB_MODE_ACTIVE); (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
break; break;
case WM8350_DCDC_5: case WM8350_DCDC_5:
val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK; & ~WM8350_DC5_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
WM8350_DC5_HIB_MODE_ACTIVE); (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
break; break;
default: default:
return -EINVAL; return -EINVAL;
@ -600,13 +600,13 @@ static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK; & ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
WM8350_DC2_HIB_MODE_DISABLE); (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
break; break;
case WM8350_DCDC_5: case WM8350_DCDC_5:
val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK; & ~WM8350_DC5_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
WM8350_DC2_HIB_MODE_DISABLE); (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
break; break;
default: default:
return -EINVAL; return -EINVAL;