Merge commit 'jwb/jwb-next'
This commit is contained in:
Benjamin Herrenschmidt
@@ -68,7 +68,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
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fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
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cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
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cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
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virtex405-head.S redboot-83xx.c cuboot-sam440ep.c
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virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
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src-boot := $(src-wlib) $(src-plat) empty.c
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src-boot := $(addprefix $(obj)/, $(src-boot))
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@@ -276,6 +276,9 @@ ifeq ($(CONFIG_PPC32),y)
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image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot
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endif
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# Allow extra targets to be added to the defconfig
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image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS))
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initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
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initrd-y := $(patsubst zImage%, zImage.initrd%, \
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$(patsubst dtbImage%, dtbImage.initrd%, \
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296
arch/powerpc/boot/dts/virtex440-ml507.dts
Normal file
296
arch/powerpc/boot/dts/virtex440-ml507.dts
Normal file
@@ -0,0 +1,296 @@
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/*
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* This file supports the Xilinx ML507 board with the 440 processor.
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* A reference design for the FPGA is provided at http://git.xilinx.com.
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*
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* (C) Copyright 2008 Xilinx, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,virtex440";
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dcr-parent = <&ppc440_0>;
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model = "testing";
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DDR2_SDRAM: memory@0 {
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device_type = "memory";
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reg = < 0 0x10000000 >;
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} ;
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chosen {
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bootargs = "console=ttyS0 ip=on root=/dev/ram";
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linux,stdout-path = "/plb@0/serial@83e00000";
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} ;
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cpus {
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#address-cells = <1>;
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#cpus = <1>;
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#size-cells = <0>;
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ppc440_0: cpu@0 {
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clock-frequency = <400000000>;
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compatible = "PowerPC,440", "ibm,ppc440";
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d-cache-line-size = <0x20>;
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d-cache-size = <0x8000>;
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dcr-access-method = "native";
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dcr-controller ;
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device_type = "cpu";
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i-cache-line-size = <0x20>;
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i-cache-size = <0x8000>;
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model = "PowerPC,440";
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reg = <0>;
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timebase-frequency = <400000000>;
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xlnx,apu-control = <1>;
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xlnx,apu-udi-0 = <0>;
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xlnx,apu-udi-1 = <0>;
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xlnx,apu-udi-10 = <0>;
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xlnx,apu-udi-11 = <0>;
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xlnx,apu-udi-12 = <0>;
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xlnx,apu-udi-13 = <0>;
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xlnx,apu-udi-14 = <0>;
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xlnx,apu-udi-15 = <0>;
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xlnx,apu-udi-2 = <0>;
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xlnx,apu-udi-3 = <0>;
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xlnx,apu-udi-4 = <0>;
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xlnx,apu-udi-5 = <0>;
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xlnx,apu-udi-6 = <0>;
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xlnx,apu-udi-7 = <0>;
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xlnx,apu-udi-8 = <0>;
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xlnx,apu-udi-9 = <0>;
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xlnx,dcr-autolock-enable = <1>;
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xlnx,dcu-rd-ld-cache-plb-prio = <0>;
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xlnx,dcu-rd-noncache-plb-prio = <0>;
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xlnx,dcu-rd-touch-plb-prio = <0>;
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xlnx,dcu-rd-urgent-plb-prio = <0>;
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xlnx,dcu-wr-flush-plb-prio = <0>;
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xlnx,dcu-wr-store-plb-prio = <0>;
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xlnx,dcu-wr-urgent-plb-prio = <0>;
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xlnx,dma0-control = <0>;
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xlnx,dma0-plb-prio = <0>;
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xlnx,dma0-rxchannelctrl = <0x1010000>;
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xlnx,dma0-rxirqtimer = <0x3ff>;
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xlnx,dma0-txchannelctrl = <0x1010000>;
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xlnx,dma0-txirqtimer = <0x3ff>;
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xlnx,dma1-control = <0>;
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xlnx,dma1-plb-prio = <0>;
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xlnx,dma1-rxchannelctrl = <0x1010000>;
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xlnx,dma1-rxirqtimer = <0x3ff>;
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xlnx,dma1-txchannelctrl = <0x1010000>;
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xlnx,dma1-txirqtimer = <0x3ff>;
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xlnx,dma2-control = <0>;
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xlnx,dma2-plb-prio = <0>;
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xlnx,dma2-rxchannelctrl = <0x1010000>;
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xlnx,dma2-rxirqtimer = <0x3ff>;
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xlnx,dma2-txchannelctrl = <0x1010000>;
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xlnx,dma2-txirqtimer = <0x3ff>;
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xlnx,dma3-control = <0>;
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xlnx,dma3-plb-prio = <0>;
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xlnx,dma3-rxchannelctrl = <0x1010000>;
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xlnx,dma3-rxirqtimer = <0x3ff>;
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xlnx,dma3-txchannelctrl = <0x1010000>;
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xlnx,dma3-txirqtimer = <0x3ff>;
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xlnx,endian-reset = <0>;
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xlnx,generate-plb-timespecs = <1>;
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xlnx,icu-rd-fetch-plb-prio = <0>;
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xlnx,icu-rd-spec-plb-prio = <0>;
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xlnx,icu-rd-touch-plb-prio = <0>;
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xlnx,interconnect-imask = <0xffffffff>;
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xlnx,mplb-allow-lock-xfer = <1>;
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xlnx,mplb-arb-mode = <0>;
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xlnx,mplb-awidth = <0x20>;
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xlnx,mplb-counter = <0x500>;
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xlnx,mplb-dwidth = <0x80>;
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xlnx,mplb-max-burst = <8>;
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xlnx,mplb-native-dwidth = <0x80>;
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xlnx,mplb-p2p = <0>;
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xlnx,mplb-prio-dcur = <2>;
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xlnx,mplb-prio-dcuw = <3>;
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xlnx,mplb-prio-icu = <4>;
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xlnx,mplb-prio-splb0 = <1>;
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xlnx,mplb-prio-splb1 = <0>;
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xlnx,mplb-read-pipe-enable = <1>;
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xlnx,mplb-sync-tattribute = <0>;
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xlnx,mplb-wdog-enable = <1>;
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xlnx,mplb-write-pipe-enable = <1>;
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xlnx,mplb-write-post-enable = <1>;
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xlnx,num-dma = <1>;
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xlnx,pir = <0xf>;
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||||
xlnx,ppc440mc-addr-base = <0>;
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xlnx,ppc440mc-addr-high = <0xfffffff>;
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xlnx,ppc440mc-arb-mode = <0>;
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xlnx,ppc440mc-bank-conflict-mask = <0xc00000>;
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xlnx,ppc440mc-control = <0xf810008f>;
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xlnx,ppc440mc-max-burst = <8>;
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xlnx,ppc440mc-prio-dcur = <2>;
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||||
xlnx,ppc440mc-prio-dcuw = <3>;
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||||
xlnx,ppc440mc-prio-icu = <4>;
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||||
xlnx,ppc440mc-prio-splb0 = <1>;
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xlnx,ppc440mc-prio-splb1 = <0>;
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xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>;
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xlnx,ppcdm-asyncmode = <0>;
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xlnx,ppcds-asyncmode = <0>;
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xlnx,user-reset = <0>;
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DMA0: sdma@80 {
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compatible = "xlnx,ll-dma-1.00.a";
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dcr-reg = < 0x80 0x11 >;
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interrupt-parent = <&xps_intc_0>;
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interrupts = < 9 2 0xa 2 >;
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} ;
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} ;
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} ;
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plb_v46_0: plb@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,plb-v46-1.02.a", "simple-bus";
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ranges ;
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DIP_Switches_8Bit: gpio@81460000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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interrupt-parent = <&xps_intc_0>;
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interrupts = < 6 2 >;
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reg = < 0x81460000 0x10000 >;
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xlnx,all-inputs = <1>;
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xlnx,all-inputs-2 = <0>;
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xlnx,dout-default = <0>;
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xlnx,dout-default-2 = <0>;
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xlnx,family = "virtex5";
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xlnx,gpio-width = <8>;
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xlnx,interrupt-present = <1>;
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xlnx,is-bidir = <1>;
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xlnx,is-bidir-2 = <1>;
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xlnx,is-dual = <0>;
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xlnx,tri-default = <0xffffffff>;
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xlnx,tri-default-2 = <0xffffffff>;
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} ;
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Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,compound";
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ethernet@81c00000 {
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compatible = "xlnx,xps-ll-temac-1.01.b";
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device_type = "network";
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interrupt-parent = <&xps_intc_0>;
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interrupts = < 5 2 >;
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llink-connected = <&DMA0>;
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local-mac-address = [ 02 00 00 00 00 00 ];
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reg = < 0x81c00000 0x40 >;
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xlnx,bus2core-clk-ratio = <1>;
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xlnx,phy-type = <1>;
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xlnx,phyaddr = <1>;
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xlnx,rxcsum = <1>;
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xlnx,rxfifo = <0x1000>;
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xlnx,temac-type = <0>;
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xlnx,txcsum = <1>;
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xlnx,txfifo = <0x1000>;
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} ;
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} ;
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LEDs_8Bit: gpio@81400000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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reg = < 0x81400000 0x10000 >;
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||||
xlnx,all-inputs = <0>;
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xlnx,all-inputs-2 = <0>;
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||||
xlnx,dout-default = <0>;
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||||
xlnx,dout-default-2 = <0>;
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||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <8>;
|
||||
xlnx,interrupt-present = <0>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
LEDs_Positions: gpio@81420000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
reg = < 0x81420000 0x10000 >;
|
||||
xlnx,all-inputs = <0>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <5>;
|
||||
xlnx,interrupt-present = <0>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
Push_Buttons_5Bit: gpio@81440000 {
|
||||
compatible = "xlnx,xps-gpio-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 7 2 >;
|
||||
reg = < 0x81440000 0x10000 >;
|
||||
xlnx,all-inputs = <1>;
|
||||
xlnx,all-inputs-2 = <0>;
|
||||
xlnx,dout-default = <0>;
|
||||
xlnx,dout-default-2 = <0>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gpio-width = <5>;
|
||||
xlnx,interrupt-present = <1>;
|
||||
xlnx,is-bidir = <1>;
|
||||
xlnx,is-bidir-2 = <1>;
|
||||
xlnx,is-dual = <0>;
|
||||
xlnx,tri-default = <0xffffffff>;
|
||||
xlnx,tri-default-2 = <0xffffffff>;
|
||||
} ;
|
||||
RS232_Uart_1: serial@83e00000 {
|
||||
clock-frequency = <100000000>;
|
||||
compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";
|
||||
current-speed = <0x2580>;
|
||||
device_type = "serial";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 8 2 >;
|
||||
reg = < 0x83e00000 0x10000 >;
|
||||
reg-offset = <3>;
|
||||
reg-shift = <2>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,has-external-rclk = <0>;
|
||||
xlnx,has-external-xin = <0>;
|
||||
xlnx,is-a-16550 = <1>;
|
||||
} ;
|
||||
SysACE_CompactFlash: sysace@83600000 {
|
||||
compatible = "xlnx,xps-sysace-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 4 2 >;
|
||||
reg = < 0x83600000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,mem-width = <0x10>;
|
||||
} ;
|
||||
xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
|
||||
compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
|
||||
reg = < 0xffff0000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
} ;
|
||||
xps_intc_0: interrupt-controller@81800000 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "xlnx,xps-intc-1.00.a";
|
||||
interrupt-controller ;
|
||||
reg = < 0x81800000 0x10000 >;
|
||||
xlnx,num-intr-inputs = <0xb>;
|
||||
} ;
|
||||
xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
|
||||
compatible = "xlnx,xps-timebase-wdt-1.00.b";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 2 0 1 2 >;
|
||||
reg = < 0x83a00000 0x10000 >;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,wdt-enable-once = <0>;
|
||||
xlnx,wdt-interval = <0x1e>;
|
||||
} ;
|
||||
xps_timer_1: timer@83c00000 {
|
||||
compatible = "xlnx,xps-timer-1.00.a";
|
||||
interrupt-parent = <&xps_intc_0>;
|
||||
interrupts = < 3 2 >;
|
||||
reg = < 0x83c00000 0x10000 >;
|
||||
xlnx,count-width = <0x20>;
|
||||
xlnx,family = "virtex5";
|
||||
xlnx,gen0-assert = <1>;
|
||||
xlnx,gen1-assert = <1>;
|
||||
xlnx,one-timer-only = <1>;
|
||||
xlnx,trig0-assert = <1>;
|
||||
xlnx,trig1-assert = <1>;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
||||
@@ -23,6 +23,8 @@
|
||||
|
||||
BSS_STACK(4*1024);
|
||||
|
||||
extern int platform_specific_init(void) __attribute__((weak));
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
@@ -80,5 +82,9 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
|
||||
/* prepare the device tree and find the console */
|
||||
fdt_init(_dtb_start);
|
||||
|
||||
if (platform_specific_init)
|
||||
platform_specific_init();
|
||||
|
||||
serial_console_init();
|
||||
}
|
||||
|
||||
100
arch/powerpc/boot/virtex.c
Normal file
100
arch/powerpc/boot/virtex.c
Normal file
@@ -0,0 +1,100 @@
|
||||
/*
|
||||
* The platform specific code for virtex devices since a boot loader is not
|
||||
* always used.
|
||||
*
|
||||
* (C) Copyright 2008 Xilinx, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "ops.h"
|
||||
#include "io.h"
|
||||
#include "stdio.h"
|
||||
|
||||
#define UART_DLL 0 /* Out: Divisor Latch Low */
|
||||
#define UART_DLM 1 /* Out: Divisor Latch High */
|
||||
#define UART_FCR 2 /* Out: FIFO Control Register */
|
||||
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
|
||||
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
|
||||
#define UART_LCR 3 /* Out: Line Control Register */
|
||||
#define UART_MCR 4 /* Out: Modem Control Register */
|
||||
#define UART_MCR_RTS 0x02 /* RTS complement */
|
||||
#define UART_MCR_DTR 0x01 /* DTR complement */
|
||||
#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
|
||||
#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
|
||||
|
||||
static int virtex_ns16550_console_init(void *devp)
|
||||
{
|
||||
unsigned char *reg_base;
|
||||
u32 reg_shift, reg_offset, clk, spd;
|
||||
u16 divisor;
|
||||
int n;
|
||||
|
||||
if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1)
|
||||
return -1;
|
||||
|
||||
n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset));
|
||||
if (n == sizeof(reg_offset))
|
||||
reg_base += reg_offset;
|
||||
|
||||
n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift));
|
||||
if (n != sizeof(reg_shift))
|
||||
reg_shift = 0;
|
||||
|
||||
n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
|
||||
if (n != sizeof(spd))
|
||||
spd = 9600;
|
||||
|
||||
/* should there be a default clock rate?*/
|
||||
n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
|
||||
if (n != sizeof(clk))
|
||||
return -1;
|
||||
|
||||
divisor = clk / (16 * spd);
|
||||
|
||||
/* Access baud rate */
|
||||
out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);
|
||||
|
||||
/* Baud rate based on input clock */
|
||||
out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
|
||||
out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);
|
||||
|
||||
/* 8 data, 1 stop, no parity */
|
||||
out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
|
||||
|
||||
/* RTS/DTR */
|
||||
out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);
|
||||
|
||||
/* Clear transmitter and receiver */
|
||||
out_8(reg_base + (UART_FCR << reg_shift),
|
||||
UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* For virtex, the kernel may be loaded without using a bootloader and if so
|
||||
some UARTs need more setup than is provided in the normal console init
|
||||
*/
|
||||
int platform_specific_init(void)
|
||||
{
|
||||
void *devp;
|
||||
char devtype[MAX_PROP_LEN];
|
||||
char path[MAX_PATH_LEN];
|
||||
|
||||
devp = finddevice("/chosen");
|
||||
if (devp == NULL)
|
||||
return -1;
|
||||
|
||||
if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
|
||||
devp = finddevice(path);
|
||||
if (devp == NULL)
|
||||
return -1;
|
||||
|
||||
if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0)
|
||||
&& !strcmp(devtype, "serial")
|
||||
&& (dt_is_compatible(devp, "ns16550")))
|
||||
virtex_ns16550_console_init(devp);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -207,7 +207,15 @@ adder875-redboot)
|
||||
binary=y
|
||||
;;
|
||||
simpleboot-virtex405-*)
|
||||
platformo="$object/virtex405-head.o $object/simpleboot.o"
|
||||
platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
|
||||
binary=y
|
||||
;;
|
||||
simpleboot-virtex440-*)
|
||||
platformo="$object/simpleboot.o $object/virtex.o"
|
||||
binary=y
|
||||
;;
|
||||
simpleboot-*)
|
||||
platformo="$object/simpleboot.o"
|
||||
binary=y
|
||||
;;
|
||||
asp834x-redboot)
|
||||
|
||||
Reference in New Issue
Block a user