[MIPS] Oprofile: Support VSMP on 34K.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -12,16 +12,70 @@
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#include "op_impl.h"
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#include "op_impl.h"
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#define M_PERFCTL_EXL (1UL << 0)
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#define M_PERFCTL_EXL (1UL << 0)
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#define M_PERFCTL_KERNEL (1UL << 1)
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#define M_PERFCTL_KERNEL (1UL << 1)
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#define M_PERFCTL_SUPERVISOR (1UL << 2)
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#define M_PERFCTL_SUPERVISOR (1UL << 2)
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#define M_PERFCTL_USER (1UL << 3)
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#define M_PERFCTL_USER (1UL << 3)
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#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
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#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
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#define M_PERFCTL_EVENT(event) ((event) << 5)
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#define M_PERFCTL_EVENT(event) ((event) << 5)
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#define M_PERFCTL_WIDE (1UL << 30)
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#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
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#define M_PERFCTL_MORE (1UL << 31)
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#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
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#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)
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#define M_TC_EN_VPE M_PERFCTL_MT_EN(1)
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#define M_TC_EN_TC M_PERFCTL_MT_EN(2)
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#define M_PERFCTL_TCID(tcid) ((tcid) << 22)
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#define M_PERFCTL_WIDE (1UL << 30)
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#define M_PERFCTL_MORE (1UL << 31)
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#define M_COUNTER_OVERFLOW (1UL << 31)
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#define M_COUNTER_OVERFLOW (1UL << 31)
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#ifdef CONFIG_MIPS_MT_SMP
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#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
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#else
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#define WHAT 0
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#endif
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#define __define_perf_accessors(r, n, np) \
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\
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static inline unsigned int r_c0_ ## r ## n(void) \
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{ \
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unsigned int cpu = smp_processor_id(); \
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\
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switch (cpu) { \
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case 0: \
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return read_c0_ ## r ## n(); \
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case 1: \
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return read_c0_ ## r ## np(); \
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default: \
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BUG(); \
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} \
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} \
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\
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static inline void w_c0_ ## r ## n(unsigned int value) \
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{ \
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unsigned int cpu = smp_processor_id(); \
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\
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switch (cpu) { \
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case 0: \
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write_c0_ ## r ## n(value); \
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return; \
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case 1: \
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write_c0_ ## r ## np(value); \
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return; \
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default: \
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BUG(); \
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} \
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} \
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__define_perf_accessors(perfcntr, 0, 2)
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__define_perf_accessors(perfcntr, 1, 3)
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__define_perf_accessors(perfcntr, 2, 2)
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__define_perf_accessors(perfcntr, 3, 2)
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__define_perf_accessors(perfctrl, 0, 2)
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__define_perf_accessors(perfctrl, 1, 3)
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__define_perf_accessors(perfctrl, 2, 2)
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__define_perf_accessors(perfctrl, 3, 2)
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struct op_mips_model op_model_mipsxx_ops;
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struct op_mips_model op_model_mipsxx_ops;
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@ -66,17 +120,17 @@ static void mipsxx_cpu_setup (void *args)
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switch (counters) {
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switch (counters) {
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case 4:
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case 4:
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write_c0_perfctrl3(0);
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w_c0_perfctrl3(0);
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write_c0_perfcntr3(reg.counter[3]);
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w_c0_perfcntr3(reg.counter[3]);
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case 3:
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case 3:
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write_c0_perfctrl2(0);
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w_c0_perfctrl2(0);
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write_c0_perfcntr2(reg.counter[2]);
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w_c0_perfcntr2(reg.counter[2]);
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case 2:
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case 2:
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write_c0_perfctrl1(0);
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w_c0_perfctrl1(0);
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write_c0_perfcntr1(reg.counter[1]);
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w_c0_perfcntr1(reg.counter[1]);
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case 1:
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case 1:
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write_c0_perfctrl0(0);
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w_c0_perfctrl0(0);
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write_c0_perfcntr0(reg.counter[0]);
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w_c0_perfcntr0(reg.counter[0]);
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}
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}
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}
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}
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@ -87,13 +141,13 @@ static void mipsxx_cpu_start(void *args)
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switch (counters) {
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switch (counters) {
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case 4:
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case 4:
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write_c0_perfctrl3(reg.control[3]);
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w_c0_perfctrl3(WHAT | reg.control[3]);
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case 3:
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case 3:
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write_c0_perfctrl2(reg.control[2]);
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w_c0_perfctrl2(WHAT | reg.control[2]);
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case 2:
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case 2:
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write_c0_perfctrl1(reg.control[1]);
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w_c0_perfctrl1(WHAT | reg.control[1]);
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case 1:
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case 1:
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write_c0_perfctrl0(reg.control[0]);
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w_c0_perfctrl0(WHAT | reg.control[0]);
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}
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}
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}
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}
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@ -104,13 +158,13 @@ static void mipsxx_cpu_stop(void *args)
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switch (counters) {
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switch (counters) {
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case 4:
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case 4:
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write_c0_perfctrl3(0);
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w_c0_perfctrl3(0);
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case 3:
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case 3:
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write_c0_perfctrl2(0);
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w_c0_perfctrl2(0);
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case 2:
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case 2:
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write_c0_perfctrl1(0);
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w_c0_perfctrl1(0);
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case 1:
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case 1:
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write_c0_perfctrl0(0);
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w_c0_perfctrl0(0);
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}
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}
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}
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}
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@ -124,12 +178,12 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
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switch (counters) {
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switch (counters) {
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#define HANDLE_COUNTER(n) \
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#define HANDLE_COUNTER(n) \
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case n + 1: \
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case n + 1: \
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control = read_c0_perfctrl ## n(); \
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control = r_c0_perfctrl ## n(); \
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counter = read_c0_perfcntr ## n(); \
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counter = r_c0_perfcntr ## n(); \
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if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
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if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
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(counter & M_COUNTER_OVERFLOW)) { \
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(counter & M_COUNTER_OVERFLOW)) { \
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oprofile_add_sample(regs, n); \
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oprofile_add_sample(regs, n); \
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write_c0_perfcntr ## n(reg.counter[n]); \
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w_c0_perfcntr ## n(reg.counter[n]); \
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handled = 1; \
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handled = 1; \
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}
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}
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HANDLE_COUNTER(3)
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HANDLE_COUNTER(3)
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@ -143,35 +197,47 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
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#define M_CONFIG1_PC (1 << 4)
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#define M_CONFIG1_PC (1 << 4)
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static inline int n_counters(void)
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static inline int __n_counters(void)
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{
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{
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if (!(read_c0_config1() & M_CONFIG1_PC))
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if (!(read_c0_config1() & M_CONFIG1_PC))
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return 0;
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return 0;
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if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
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if (!(r_c0_perfctrl0() & M_PERFCTL_MORE))
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return 1;
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return 1;
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if (!(read_c0_perfctrl1() & M_PERFCTL_MORE))
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if (!(r_c0_perfctrl1() & M_PERFCTL_MORE))
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return 2;
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return 2;
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if (!(read_c0_perfctrl2() & M_PERFCTL_MORE))
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if (!(r_c0_perfctrl2() & M_PERFCTL_MORE))
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return 3;
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return 3;
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return 4;
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return 4;
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}
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}
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static inline int n_counters(void)
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{
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int counters = __n_counters();
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#ifndef CONFIG_SMP
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if (current_cpu_data.cputype == CPU_34K)
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return counters >> 1;
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#endif
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return counters;
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}
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static inline void reset_counters(int counters)
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static inline void reset_counters(int counters)
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{
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{
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switch (counters) {
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switch (counters) {
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case 4:
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case 4:
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write_c0_perfctrl3(0);
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w_c0_perfctrl3(0);
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write_c0_perfcntr3(0);
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w_c0_perfcntr3(0);
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case 3:
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case 3:
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write_c0_perfctrl2(0);
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w_c0_perfctrl2(0);
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write_c0_perfcntr2(0);
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w_c0_perfcntr2(0);
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case 2:
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case 2:
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write_c0_perfctrl1(0);
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w_c0_perfctrl1(0);
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write_c0_perfcntr1(0);
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w_c0_perfcntr1(0);
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case 1:
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case 1:
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write_c0_perfctrl0(0);
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w_c0_perfctrl0(0);
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write_c0_perfcntr0(0);
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w_c0_perfcntr0(0);
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}
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}
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}
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}
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@ -201,7 +267,6 @@ static int __init mipsxx_init(void)
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op_model_mipsxx_ops.cpu_type = "mips/25K";
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op_model_mipsxx_ops.cpu_type = "mips/25K";
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break;
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break;
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#ifndef CONFIG_SMP
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case CPU_34K:
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case CPU_34K:
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op_model_mipsxx_ops.cpu_type = "mips/34K";
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op_model_mipsxx_ops.cpu_type = "mips/34K";
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break;
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break;
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@ -209,7 +274,6 @@ static int __init mipsxx_init(void)
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case CPU_74K:
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case CPU_74K:
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op_model_mipsxx_ops.cpu_type = "mips/74K";
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op_model_mipsxx_ops.cpu_type = "mips/74K";
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break;
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break;
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#endif
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case CPU_5KC:
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case CPU_5KC:
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op_model_mipsxx_ops.cpu_type = "mips/5K";
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op_model_mipsxx_ops.cpu_type = "mips/5K";
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