forked from Minki/linux
regmap: mmio: Convert to regmap_bus and fix accessor usage
Currently regmap-mmio uses the __raw accessors to read and write from memory. This is not safe as these interact poorly with spinlocks and are not guaranteed to generate emulated instructions on at least ARM where regmap is commonly used. The APIs that are provided all provide some byte swapping so this is difficult to do with the current regmap-mmio implementation which attempts to use the regmap core byte swapping. We can fix this by modernising the MMIO implementation to use reg_read() and reg_write() operations which were added after the API was implemented and pass simple unsigned integers through to the bus, making use of the formatting provided by the I/O accessors using a similar pattern to that used by the core. This will be less efficient for block I/O operations since we now enable and disable any required clocks per register but it is not clear that any users of regmap-mmio actually use block I/O and there is room to optimise later. This removes support for big endian I/O on 64 bit registers since no I/O accessors are provided, no current users were found and support can be added easily once they are available. In addition make the default endianness little endian. This was the behaviour prior to29bb45f25f(regmap-mmio: Use native endianness for read/write) and is the behaviour desired by most existing users, the users have been audited and those that need native endianness converted to request it explicitly. Previously native was documented as the default but due to the byte swapping in the accessors this was not correctly implemented. Fixes:29bb45f25f(regmap-mmio: Use native endianness for read/write) Reported-by: Johannes Berg <johannes@sipsolutions.net> Tested-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mark Brown
parent
25d6463e48
commit
922a9f936e
@ -25,26 +25,14 @@
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struct regmap_mmio_context {
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void __iomem *regs;
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unsigned reg_bytes;
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unsigned val_bytes;
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unsigned pad_bytes;
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struct clk *clk;
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};
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static inline void regmap_mmio_regsize_check(size_t reg_size)
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{
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switch (reg_size) {
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case 1:
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case 2:
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case 4:
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#ifdef CONFIG_64BIT
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case 8:
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#endif
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break;
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default:
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BUG();
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}
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}
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void (*reg_write)(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val);
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unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
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unsigned int reg);
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};
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static int regmap_mmio_regbits_check(size_t reg_bits)
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{
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@ -88,72 +76,62 @@ static int regmap_mmio_get_min_stride(size_t val_bits)
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return min_stride;
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}
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static inline void regmap_mmio_count_check(size_t count, u32 offset)
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static void regmap_mmio_write8(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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BUG_ON(count <= offset);
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writeb(val, ctx->regs + reg);
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}
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static inline unsigned int
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regmap_mmio_get_offset(const void *reg, size_t reg_size)
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static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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switch (reg_size) {
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case 1:
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return *(u8 *)reg;
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case 2:
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return *(u16 *)reg;
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case 4:
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return *(u32 *)reg;
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writew(val, ctx->regs + reg);
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}
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static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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iowrite16be(val, ctx->regs + reg);
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}
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static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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writel(val, ctx->regs + reg);
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}
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static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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iowrite32be(val, ctx->regs + reg);
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}
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#ifdef CONFIG_64BIT
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case 8:
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return *(u64 *)reg;
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#endif
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default:
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BUG();
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}
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static void regmap_mmio_write64le(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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{
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writeq(val, ctx->regs + reg);
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}
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#endif
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static int regmap_mmio_gather_write(void *context,
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const void *reg, size_t reg_size,
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const void *val, size_t val_size)
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static int regmap_mmio_write(void *context, unsigned int reg, unsigned int val)
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{
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struct regmap_mmio_context *ctx = context;
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unsigned int offset;
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int ret;
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regmap_mmio_regsize_check(reg_size);
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if (!IS_ERR(ctx->clk)) {
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ret = clk_enable(ctx->clk);
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if (ret < 0)
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return ret;
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}
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offset = regmap_mmio_get_offset(reg, reg_size);
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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__raw_writeb(*(u8 *)val, ctx->regs + offset);
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break;
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case 2:
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__raw_writew(*(u16 *)val, ctx->regs + offset);
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break;
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case 4:
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__raw_writel(*(u32 *)val, ctx->regs + offset);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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__raw_writeq(*(u64 *)val, ctx->regs + offset);
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break;
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#endif
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default:
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/* Should be caught by regmap_mmio_check_config */
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BUG();
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}
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val_size -= ctx->val_bytes;
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val += ctx->val_bytes;
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offset += ctx->val_bytes;
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}
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ctx->reg_write(ctx, reg, val);
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if (!IS_ERR(ctx->clk))
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clk_disable(ctx->clk);
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@ -161,59 +139,56 @@ static int regmap_mmio_gather_write(void *context,
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return 0;
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}
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static int regmap_mmio_write(void *context, const void *data, size_t count)
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static unsigned int regmap_mmio_read8(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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struct regmap_mmio_context *ctx = context;
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unsigned int offset = ctx->reg_bytes + ctx->pad_bytes;
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regmap_mmio_count_check(count, offset);
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return regmap_mmio_gather_write(context, data, ctx->reg_bytes,
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data + offset, count - offset);
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return readb(ctx->regs + reg);
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}
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static int regmap_mmio_read(void *context,
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const void *reg, size_t reg_size,
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void *val, size_t val_size)
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static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return readw(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread16be(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return readl(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read32be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread32be(ctx->regs + reg);
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}
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#ifdef CONFIG_64BIT
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static unsigned int regmap_mmio_read64le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return readq(ctx->regs + reg);
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}
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#endif
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static int regmap_mmio_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct regmap_mmio_context *ctx = context;
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unsigned int offset;
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int ret;
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regmap_mmio_regsize_check(reg_size);
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if (!IS_ERR(ctx->clk)) {
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ret = clk_enable(ctx->clk);
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if (ret < 0)
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return ret;
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}
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offset = regmap_mmio_get_offset(reg, reg_size);
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while (val_size) {
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switch (ctx->val_bytes) {
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case 1:
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*(u8 *)val = __raw_readb(ctx->regs + offset);
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break;
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case 2:
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*(u16 *)val = __raw_readw(ctx->regs + offset);
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break;
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case 4:
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*(u32 *)val = __raw_readl(ctx->regs + offset);
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break;
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#ifdef CONFIG_64BIT
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case 8:
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*(u64 *)val = __raw_readq(ctx->regs + offset);
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break;
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#endif
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default:
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/* Should be caught by regmap_mmio_check_config */
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BUG();
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}
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val_size -= ctx->val_bytes;
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val += ctx->val_bytes;
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offset += ctx->val_bytes;
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}
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*val = ctx->reg_read(ctx, reg);
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if (!IS_ERR(ctx->clk))
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clk_disable(ctx->clk);
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@ -232,14 +207,11 @@ static void regmap_mmio_free_context(void *context)
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kfree(context);
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}
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static struct regmap_bus regmap_mmio = {
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static const struct regmap_bus regmap_mmio = {
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.fast_io = true,
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.write = regmap_mmio_write,
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.gather_write = regmap_mmio_gather_write,
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.read = regmap_mmio_read,
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.reg_write = regmap_mmio_write,
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.reg_read = regmap_mmio_read,
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.free_context = regmap_mmio_free_context,
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.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
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.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
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};
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static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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@ -265,24 +237,71 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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if (config->reg_stride < min_stride)
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return ERR_PTR(-EINVAL);
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switch (config->reg_format_endian) {
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case REGMAP_ENDIAN_DEFAULT:
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case REGMAP_ENDIAN_NATIVE:
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break;
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default:
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return ERR_PTR(-EINVAL);
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}
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return ERR_PTR(-ENOMEM);
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ctx->regs = regs;
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ctx->val_bytes = config->val_bits / 8;
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ctx->reg_bytes = config->reg_bits / 8;
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ctx->pad_bytes = config->pad_bits / 8;
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ctx->clk = ERR_PTR(-ENODEV);
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switch (config->reg_format_endian) {
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case REGMAP_ENDIAN_DEFAULT:
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case REGMAP_ENDIAN_LITTLE:
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#ifdef __LITTLE_ENDIAN
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case REGMAP_ENDIAN_NATIVE:
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#endif
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switch (config->val_bits) {
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case 8:
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ctx->reg_read = regmap_mmio_read8;
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ctx->reg_write = regmap_mmio_write8;
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break;
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case 16:
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ctx->reg_read = regmap_mmio_read16le;
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ctx->reg_write = regmap_mmio_write16le;
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break;
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case 32:
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ctx->reg_read = regmap_mmio_read32le;
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ctx->reg_write = regmap_mmio_write32le;
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break;
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#ifdef CONFIG_64BIT
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case 64:
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ctx->reg_read = regmap_mmio_read64le;
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ctx->reg_write = regmap_mmio_write64le;
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break;
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#endif
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default:
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ret = -EINVAL;
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goto err_free;
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}
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break;
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case REGMAP_ENDIAN_BIG:
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#ifdef __BIG_ENDIAN
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case REGMAP_ENDIAN_NATIVE:
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#endif
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switch (config->val_bits) {
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case 8:
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ctx->reg_read = regmap_mmio_read8;
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ctx->reg_write = regmap_mmio_write8;
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break;
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case 16:
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ctx->reg_read = regmap_mmio_read16be;
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ctx->reg_write = regmap_mmio_write16be;
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break;
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case 32:
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ctx->reg_read = regmap_mmio_read32be;
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ctx->reg_write = regmap_mmio_write32be;
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break;
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default:
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ret = -EINVAL;
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goto err_free;
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}
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break;
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default:
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ret = -EINVAL;
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goto err_free;
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}
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if (clk_id == NULL)
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return ctx;
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