forked from Minki/linux
net/mlx5: DR, Add support for dumping steering info
Extend mlx5 debugfs support to present Software Steering resources: dr_domain including it's tables, matchers and rules. The interface is read-only. While dump is being presented, new steering rules cannot be inserted/deleted. The steering information is dumped in the CSV form with the following format: <object_type>,<object_ID>, <object_info>,...,<object_info> This data can be read at the following path: /sys/kernel/debug/mlx5/<BDF>/steering/fdb/<domain_handle> Example: # cat /sys/kernel/debug/mlx5/0000:82:00.0/steering/fdb/dmn_000018644 3100,0x55caa4621c50,0xee802,4,65533 3101,0x55caa4621c50,0xe0100008 Changes in V2: - Reduce temp hex buffer size and avoid unnecessary memset - Use bin2hex() instead of DIY loop - Don't check debugfs functions return values Signed-off-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
This commit is contained in:
parent
7766c9b922
commit
9222f0b27d
@ -104,7 +104,8 @@ mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/dr_domain.o steering/dr_table.o
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steering/dr_ste.o steering/dr_send.o \
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steering/dr_ste_v0.o steering/dr_ste_v1.o \
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steering/dr_cmd.o steering/dr_fw.o \
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steering/dr_action.o steering/fs_dr.o
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steering/dr_action.o steering/fs_dr.o \
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steering/dr_dbg.o
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#
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# SF device
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#
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drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c
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649
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c
Normal file
@ -0,0 +1,649 @@
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// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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// Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#include <linux/debugfs.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include "dr_types.h"
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#define DR_DBG_PTR_TO_ID(p) ((u64)(uintptr_t)(p) & 0xFFFFFFFFULL)
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enum dr_dump_rec_type {
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DR_DUMP_REC_TYPE_DOMAIN = 3000,
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DR_DUMP_REC_TYPE_DOMAIN_INFO_FLEX_PARSER = 3001,
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DR_DUMP_REC_TYPE_DOMAIN_INFO_DEV_ATTR = 3002,
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DR_DUMP_REC_TYPE_DOMAIN_INFO_VPORT = 3003,
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DR_DUMP_REC_TYPE_DOMAIN_INFO_CAPS = 3004,
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DR_DUMP_REC_TYPE_DOMAIN_SEND_RING = 3005,
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DR_DUMP_REC_TYPE_TABLE = 3100,
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DR_DUMP_REC_TYPE_TABLE_RX = 3101,
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DR_DUMP_REC_TYPE_TABLE_TX = 3102,
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DR_DUMP_REC_TYPE_MATCHER = 3200,
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DR_DUMP_REC_TYPE_MATCHER_MASK = 3201,
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DR_DUMP_REC_TYPE_MATCHER_RX = 3202,
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DR_DUMP_REC_TYPE_MATCHER_TX = 3203,
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DR_DUMP_REC_TYPE_MATCHER_BUILDER = 3204,
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DR_DUMP_REC_TYPE_RULE = 3300,
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DR_DUMP_REC_TYPE_RULE_RX_ENTRY_V0 = 3301,
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DR_DUMP_REC_TYPE_RULE_TX_ENTRY_V0 = 3302,
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DR_DUMP_REC_TYPE_RULE_RX_ENTRY_V1 = 3303,
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DR_DUMP_REC_TYPE_RULE_TX_ENTRY_V1 = 3304,
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DR_DUMP_REC_TYPE_ACTION_ENCAP_L2 = 3400,
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DR_DUMP_REC_TYPE_ACTION_ENCAP_L3 = 3401,
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DR_DUMP_REC_TYPE_ACTION_MODIFY_HDR = 3402,
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DR_DUMP_REC_TYPE_ACTION_DROP = 3403,
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DR_DUMP_REC_TYPE_ACTION_QP = 3404,
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DR_DUMP_REC_TYPE_ACTION_FT = 3405,
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DR_DUMP_REC_TYPE_ACTION_CTR = 3406,
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DR_DUMP_REC_TYPE_ACTION_TAG = 3407,
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DR_DUMP_REC_TYPE_ACTION_VPORT = 3408,
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DR_DUMP_REC_TYPE_ACTION_DECAP_L2 = 3409,
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DR_DUMP_REC_TYPE_ACTION_DECAP_L3 = 3410,
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DR_DUMP_REC_TYPE_ACTION_DEVX_TIR = 3411,
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DR_DUMP_REC_TYPE_ACTION_PUSH_VLAN = 3412,
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DR_DUMP_REC_TYPE_ACTION_POP_VLAN = 3413,
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DR_DUMP_REC_TYPE_ACTION_SAMPLER = 3415,
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DR_DUMP_REC_TYPE_ACTION_INSERT_HDR = 3420,
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DR_DUMP_REC_TYPE_ACTION_REMOVE_HDR = 3421
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};
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void mlx5dr_dbg_tbl_add(struct mlx5dr_table *tbl)
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{
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mutex_lock(&tbl->dmn->dump_info.dbg_mutex);
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list_add_tail(&tbl->dbg_node, &tbl->dmn->dbg_tbl_list);
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mutex_unlock(&tbl->dmn->dump_info.dbg_mutex);
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}
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void mlx5dr_dbg_tbl_del(struct mlx5dr_table *tbl)
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{
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mutex_lock(&tbl->dmn->dump_info.dbg_mutex);
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list_del(&tbl->dbg_node);
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mutex_unlock(&tbl->dmn->dump_info.dbg_mutex);
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}
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void mlx5dr_dbg_rule_add(struct mlx5dr_rule *rule)
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{
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struct mlx5dr_domain *dmn = rule->matcher->tbl->dmn;
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mutex_lock(&dmn->dump_info.dbg_mutex);
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list_add_tail(&rule->dbg_node, &rule->matcher->dbg_rule_list);
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mutex_unlock(&dmn->dump_info.dbg_mutex);
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}
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void mlx5dr_dbg_rule_del(struct mlx5dr_rule *rule)
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{
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struct mlx5dr_domain *dmn = rule->matcher->tbl->dmn;
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mutex_lock(&dmn->dump_info.dbg_mutex);
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list_del(&rule->dbg_node);
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mutex_unlock(&dmn->dump_info.dbg_mutex);
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}
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static u64 dr_dump_icm_to_idx(u64 icm_addr)
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{
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return (icm_addr >> 6) & 0xffffffff;
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}
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#define DR_HEX_SIZE 256
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static void
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dr_dump_hex_print(char hex[DR_HEX_SIZE], char *src, u32 size)
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{
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if (WARN_ON_ONCE(DR_HEX_SIZE < 2 * size + 1))
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size = DR_HEX_SIZE / 2 - 1; /* truncate */
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bin2hex(hex, src, size);
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hex[2 * size] = 0; /* NULL-terminate */
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}
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static int
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dr_dump_rule_action_mem(struct seq_file *file, const u64 rule_id,
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struct mlx5dr_rule_action_member *action_mem)
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{
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struct mlx5dr_action *action = action_mem->action;
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const u64 action_id = DR_DBG_PTR_TO_ID(action);
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switch (action->action_type) {
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case DR_ACTION_TYP_DROP:
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seq_printf(file, "%d,0x%llx,0x%llx\n",
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DR_DUMP_REC_TYPE_ACTION_DROP, action_id, rule_id);
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break;
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case DR_ACTION_TYP_FT:
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if (action->dest_tbl->is_fw_tbl)
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_FT, action_id,
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rule_id, action->dest_tbl->fw_tbl.id);
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else
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_FT, action_id,
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rule_id, action->dest_tbl->tbl->table_id);
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break;
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case DR_ACTION_TYP_CTR:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_CTR, action_id, rule_id,
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action->ctr->ctr_id + action->ctr->offset);
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break;
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case DR_ACTION_TYP_TAG:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_TAG, action_id, rule_id,
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action->flow_tag->flow_tag);
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break;
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case DR_ACTION_TYP_MODIFY_HDR:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_MODIFY_HDR, action_id,
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rule_id, action->rewrite->index);
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break;
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case DR_ACTION_TYP_VPORT:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_VPORT, action_id, rule_id,
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action->vport->caps->num);
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break;
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case DR_ACTION_TYP_TNL_L2_TO_L2:
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seq_printf(file, "%d,0x%llx,0x%llx\n",
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DR_DUMP_REC_TYPE_ACTION_DECAP_L2, action_id,
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rule_id);
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break;
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case DR_ACTION_TYP_TNL_L3_TO_L2:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_DECAP_L3, action_id,
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rule_id, action->rewrite->index);
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break;
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case DR_ACTION_TYP_L2_TO_TNL_L2:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_ENCAP_L2, action_id,
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rule_id, action->reformat->id);
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break;
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case DR_ACTION_TYP_L2_TO_TNL_L3:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_ENCAP_L3, action_id,
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rule_id, action->reformat->id);
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break;
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case DR_ACTION_TYP_POP_VLAN:
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seq_printf(file, "%d,0x%llx,0x%llx\n",
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DR_DUMP_REC_TYPE_ACTION_POP_VLAN, action_id,
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rule_id);
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break;
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case DR_ACTION_TYP_PUSH_VLAN:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_PUSH_VLAN, action_id,
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rule_id, action->push_vlan->vlan_hdr);
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break;
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case DR_ACTION_TYP_INSERT_HDR:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x,0x%x,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_INSERT_HDR, action_id,
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rule_id, action->reformat->id,
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action->reformat->param_0,
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action->reformat->param_1);
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break;
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case DR_ACTION_TYP_REMOVE_HDR:
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seq_printf(file, "%d,0x%llx,0x%llx,0x%x,0x%x,0x%x\n",
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DR_DUMP_REC_TYPE_ACTION_REMOVE_HDR, action_id,
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rule_id, action->reformat->id,
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action->reformat->param_0,
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action->reformat->param_1);
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break;
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case DR_ACTION_TYP_SAMPLER:
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seq_printf(file,
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"%d,0x%llx,0x%llx,0x%x,0x%x,0x%x,0x%llx,0x%llx\n",
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DR_DUMP_REC_TYPE_ACTION_SAMPLER, action_id, rule_id,
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0, 0, action->sampler->sampler_id,
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action->sampler->rx_icm_addr,
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action->sampler->tx_icm_addr);
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break;
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default:
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return 0;
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}
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return 0;
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}
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static int
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dr_dump_rule_mem(struct seq_file *file, struct mlx5dr_ste *ste,
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bool is_rx, const u64 rule_id, u8 format_ver)
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{
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char hw_ste_dump[DR_HEX_SIZE];
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u32 mem_rec_type;
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if (format_ver == MLX5_STEERING_FORMAT_CONNECTX_5) {
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mem_rec_type = is_rx ? DR_DUMP_REC_TYPE_RULE_RX_ENTRY_V0 :
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DR_DUMP_REC_TYPE_RULE_TX_ENTRY_V0;
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} else {
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mem_rec_type = is_rx ? DR_DUMP_REC_TYPE_RULE_RX_ENTRY_V1 :
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DR_DUMP_REC_TYPE_RULE_TX_ENTRY_V1;
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}
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dr_dump_hex_print(hw_ste_dump, (char *)ste->hw_ste, DR_STE_SIZE_REDUCED);
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seq_printf(file, "%d,0x%llx,0x%llx,%s\n", mem_rec_type,
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dr_dump_icm_to_idx(mlx5dr_ste_get_icm_addr(ste)), rule_id,
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hw_ste_dump);
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return 0;
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}
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static int
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dr_dump_rule_rx_tx(struct seq_file *file, struct mlx5dr_rule_rx_tx *rule_rx_tx,
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bool is_rx, const u64 rule_id, u8 format_ver)
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{
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struct mlx5dr_ste *ste_arr[DR_RULE_MAX_STES + DR_ACTION_MAX_STES];
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struct mlx5dr_ste *curr_ste = rule_rx_tx->last_rule_ste;
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int ret, i;
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if (mlx5dr_rule_get_reverse_rule_members(ste_arr, curr_ste, &i))
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return 0;
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while (i--) {
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ret = dr_dump_rule_mem(file, ste_arr[i], is_rx, rule_id,
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format_ver);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int dr_dump_rule(struct seq_file *file, struct mlx5dr_rule *rule)
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{
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struct mlx5dr_rule_action_member *action_mem;
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const u64 rule_id = DR_DBG_PTR_TO_ID(rule);
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struct mlx5dr_rule_rx_tx *rx = &rule->rx;
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struct mlx5dr_rule_rx_tx *tx = &rule->tx;
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u8 format_ver;
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int ret;
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format_ver = rule->matcher->tbl->dmn->info.caps.sw_format_ver;
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seq_printf(file, "%d,0x%llx,0x%llx\n", DR_DUMP_REC_TYPE_RULE, rule_id,
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DR_DBG_PTR_TO_ID(rule->matcher));
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if (rx->nic_matcher) {
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ret = dr_dump_rule_rx_tx(file, rx, true, rule_id, format_ver);
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if (ret < 0)
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return ret;
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}
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if (tx->nic_matcher) {
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ret = dr_dump_rule_rx_tx(file, tx, false, rule_id, format_ver);
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if (ret < 0)
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return ret;
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}
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list_for_each_entry(action_mem, &rule->rule_actions_list, list) {
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ret = dr_dump_rule_action_mem(file, rule_id, action_mem);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int
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dr_dump_matcher_mask(struct seq_file *file, struct mlx5dr_match_param *mask,
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u8 criteria, const u64 matcher_id)
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{
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char dump[DR_HEX_SIZE];
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seq_printf(file, "%d,0x%llx,", DR_DUMP_REC_TYPE_MATCHER_MASK,
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matcher_id);
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if (criteria & DR_MATCHER_CRITERIA_OUTER) {
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dr_dump_hex_print(dump, (char *)&mask->outer, sizeof(mask->outer));
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seq_printf(file, "%s,", dump);
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} else {
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seq_puts(file, ",");
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}
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if (criteria & DR_MATCHER_CRITERIA_INNER) {
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dr_dump_hex_print(dump, (char *)&mask->inner, sizeof(mask->inner));
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seq_printf(file, "%s,", dump);
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} else {
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seq_puts(file, ",");
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}
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if (criteria & DR_MATCHER_CRITERIA_MISC) {
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dr_dump_hex_print(dump, (char *)&mask->misc, sizeof(mask->misc));
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seq_printf(file, "%s,", dump);
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} else {
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seq_puts(file, ",");
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}
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if (criteria & DR_MATCHER_CRITERIA_MISC2) {
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dr_dump_hex_print(dump, (char *)&mask->misc2, sizeof(mask->misc2));
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seq_printf(file, "%s,", dump);
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} else {
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seq_puts(file, ",");
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}
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if (criteria & DR_MATCHER_CRITERIA_MISC3) {
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dr_dump_hex_print(dump, (char *)&mask->misc3, sizeof(mask->misc3));
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seq_printf(file, "%s\n", dump);
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} else {
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seq_puts(file, ",\n");
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}
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return 0;
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}
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static int
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dr_dump_matcher_builder(struct seq_file *file, struct mlx5dr_ste_build *builder,
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u32 index, bool is_rx, const u64 matcher_id)
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{
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seq_printf(file, "%d,0x%llx,%d,%d,0x%x\n",
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DR_DUMP_REC_TYPE_MATCHER_BUILDER, matcher_id, index, is_rx,
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builder->lu_type);
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return 0;
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}
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static int
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dr_dump_matcher_rx_tx(struct seq_file *file, bool is_rx,
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struct mlx5dr_matcher_rx_tx *matcher_rx_tx,
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const u64 matcher_id)
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{
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enum dr_dump_rec_type rec_type;
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int i, ret;
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rec_type = is_rx ? DR_DUMP_REC_TYPE_MATCHER_RX :
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DR_DUMP_REC_TYPE_MATCHER_TX;
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seq_printf(file, "%d,0x%llx,0x%llx,%d,0x%llx,0x%llx\n",
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rec_type, DR_DBG_PTR_TO_ID(matcher_rx_tx),
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matcher_id, matcher_rx_tx->num_of_builders,
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dr_dump_icm_to_idx(matcher_rx_tx->s_htbl->chunk->icm_addr),
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dr_dump_icm_to_idx(matcher_rx_tx->e_anchor->chunk->icm_addr));
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for (i = 0; i < matcher_rx_tx->num_of_builders; i++) {
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ret = dr_dump_matcher_builder(file,
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&matcher_rx_tx->ste_builder[i],
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i, is_rx, matcher_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_matcher(struct seq_file *file, struct mlx5dr_matcher *matcher)
|
||||
{
|
||||
struct mlx5dr_matcher_rx_tx *rx = &matcher->rx;
|
||||
struct mlx5dr_matcher_rx_tx *tx = &matcher->tx;
|
||||
u64 matcher_id;
|
||||
int ret;
|
||||
|
||||
matcher_id = DR_DBG_PTR_TO_ID(matcher);
|
||||
|
||||
seq_printf(file, "%d,0x%llx,0x%llx,%d\n", DR_DUMP_REC_TYPE_MATCHER,
|
||||
matcher_id, DR_DBG_PTR_TO_ID(matcher->tbl), matcher->prio);
|
||||
|
||||
ret = dr_dump_matcher_mask(file, &matcher->mask,
|
||||
matcher->match_criteria, matcher_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (rx->nic_tbl) {
|
||||
ret = dr_dump_matcher_rx_tx(file, true, rx, matcher_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (tx->nic_tbl) {
|
||||
ret = dr_dump_matcher_rx_tx(file, false, tx, matcher_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_matcher_all(struct seq_file *file, struct mlx5dr_matcher *matcher)
|
||||
{
|
||||
struct mlx5dr_rule *rule;
|
||||
int ret;
|
||||
|
||||
ret = dr_dump_matcher(file, matcher);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
list_for_each_entry(rule, &matcher->dbg_rule_list, dbg_node) {
|
||||
ret = dr_dump_rule(file, rule);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_table_rx_tx(struct seq_file *file, bool is_rx,
|
||||
struct mlx5dr_table_rx_tx *table_rx_tx,
|
||||
const u64 table_id)
|
||||
{
|
||||
enum dr_dump_rec_type rec_type;
|
||||
|
||||
rec_type = is_rx ? DR_DUMP_REC_TYPE_TABLE_RX :
|
||||
DR_DUMP_REC_TYPE_TABLE_TX;
|
||||
|
||||
seq_printf(file, "%d,0x%llx,0x%llx\n", rec_type, table_id,
|
||||
dr_dump_icm_to_idx(table_rx_tx->s_anchor->chunk->icm_addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dr_dump_table(struct seq_file *file, struct mlx5dr_table *table)
|
||||
{
|
||||
struct mlx5dr_table_rx_tx *rx = &table->rx;
|
||||
struct mlx5dr_table_rx_tx *tx = &table->tx;
|
||||
int ret;
|
||||
|
||||
seq_printf(file, "%d,0x%llx,0x%llx,%d,%d\n", DR_DUMP_REC_TYPE_TABLE,
|
||||
DR_DBG_PTR_TO_ID(table), DR_DBG_PTR_TO_ID(table->dmn),
|
||||
table->table_type, table->level);
|
||||
|
||||
if (rx->nic_dmn) {
|
||||
ret = dr_dump_table_rx_tx(file, true, rx,
|
||||
DR_DBG_PTR_TO_ID(table));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (tx->nic_dmn) {
|
||||
ret = dr_dump_table_rx_tx(file, false, tx,
|
||||
DR_DBG_PTR_TO_ID(table));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dr_dump_table_all(struct seq_file *file, struct mlx5dr_table *tbl)
|
||||
{
|
||||
struct mlx5dr_matcher *matcher;
|
||||
int ret;
|
||||
|
||||
ret = dr_dump_table(file, tbl);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
list_for_each_entry(matcher, &tbl->matcher_list, list_node) {
|
||||
ret = dr_dump_matcher_all(file, matcher);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_send_ring(struct seq_file *file, struct mlx5dr_send_ring *ring,
|
||||
const u64 domain_id)
|
||||
{
|
||||
seq_printf(file, "%d,0x%llx,0x%llx,0x%x,0x%x\n",
|
||||
DR_DUMP_REC_TYPE_DOMAIN_SEND_RING, DR_DBG_PTR_TO_ID(ring),
|
||||
domain_id, ring->cq->mcq.cqn, ring->qp->qpn);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_domain_info_flex_parser(struct seq_file *file,
|
||||
const char *flex_parser_name,
|
||||
const u8 flex_parser_value,
|
||||
const u64 domain_id)
|
||||
{
|
||||
seq_printf(file, "%d,0x%llx,%s,0x%x\n",
|
||||
DR_DUMP_REC_TYPE_DOMAIN_INFO_FLEX_PARSER, domain_id,
|
||||
flex_parser_name, flex_parser_value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_domain_info_caps(struct seq_file *file, struct mlx5dr_cmd_caps *caps,
|
||||
const u64 domain_id)
|
||||
{
|
||||
struct mlx5dr_cmd_vport_cap *vport_caps;
|
||||
unsigned long i, vports_num;
|
||||
|
||||
xa_for_each(&caps->vports.vports_caps_xa, vports_num, vport_caps)
|
||||
; /* count the number of vports in xarray */
|
||||
|
||||
seq_printf(file, "%d,0x%llx,0x%x,0x%llx,0x%llx,0x%x,%lu,%d\n",
|
||||
DR_DUMP_REC_TYPE_DOMAIN_INFO_CAPS, domain_id, caps->gvmi,
|
||||
caps->nic_rx_drop_address, caps->nic_tx_drop_address,
|
||||
caps->flex_protocols, vports_num, caps->eswitch_manager);
|
||||
|
||||
xa_for_each(&caps->vports.vports_caps_xa, i, vport_caps) {
|
||||
vport_caps = xa_load(&caps->vports.vports_caps_xa, i);
|
||||
|
||||
seq_printf(file, "%d,0x%llx,%lu,0x%x,0x%llx,0x%llx\n",
|
||||
DR_DUMP_REC_TYPE_DOMAIN_INFO_VPORT, domain_id, i,
|
||||
vport_caps->vport_gvmi, vport_caps->icm_address_rx,
|
||||
vport_caps->icm_address_tx);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_domain_info(struct seq_file *file, struct mlx5dr_domain_info *info,
|
||||
const u64 domain_id)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = dr_dump_domain_info_caps(file, &info->caps, domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = dr_dump_domain_info_flex_parser(file, "icmp_dw0",
|
||||
info->caps.flex_parser_id_icmp_dw0,
|
||||
domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = dr_dump_domain_info_flex_parser(file, "icmp_dw1",
|
||||
info->caps.flex_parser_id_icmp_dw1,
|
||||
domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = dr_dump_domain_info_flex_parser(file, "icmpv6_dw0",
|
||||
info->caps.flex_parser_id_icmpv6_dw0,
|
||||
domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = dr_dump_domain_info_flex_parser(file, "icmpv6_dw1",
|
||||
info->caps.flex_parser_id_icmpv6_dw1,
|
||||
domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
dr_dump_domain(struct seq_file *file, struct mlx5dr_domain *dmn)
|
||||
{
|
||||
u64 domain_id = DR_DBG_PTR_TO_ID(dmn);
|
||||
int ret;
|
||||
|
||||
seq_printf(file, "%d,0x%llx,%d,0%x,%d,%s\n", DR_DUMP_REC_TYPE_DOMAIN,
|
||||
domain_id, dmn->type, dmn->info.caps.gvmi,
|
||||
dmn->info.supp_sw_steering, pci_name(dmn->mdev->pdev));
|
||||
|
||||
ret = dr_dump_domain_info(file, &dmn->info, domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (dmn->info.supp_sw_steering) {
|
||||
ret = dr_dump_send_ring(file, dmn->send_ring, domain_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dr_dump_domain_all(struct seq_file *file, struct mlx5dr_domain *dmn)
|
||||
{
|
||||
struct mlx5dr_table *tbl;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dmn->dump_info.dbg_mutex);
|
||||
mlx5dr_domain_lock(dmn);
|
||||
|
||||
ret = dr_dump_domain(file, dmn);
|
||||
if (ret < 0)
|
||||
goto unlock_mutex;
|
||||
|
||||
list_for_each_entry(tbl, &dmn->dbg_tbl_list, dbg_node) {
|
||||
ret = dr_dump_table_all(file, tbl);
|
||||
if (ret < 0)
|
||||
break;
|
||||
}
|
||||
|
||||
unlock_mutex:
|
||||
mlx5dr_domain_unlock(dmn);
|
||||
mutex_unlock(&dmn->dump_info.dbg_mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int dr_dump_show(struct seq_file *file, void *priv)
|
||||
{
|
||||
return dr_dump_domain_all(file, file->private);
|
||||
}
|
||||
DEFINE_SHOW_ATTRIBUTE(dr_dump);
|
||||
|
||||
void mlx5dr_dbg_init_dump(struct mlx5dr_domain *dmn)
|
||||
{
|
||||
struct mlx5_core_dev *dev = dmn->mdev;
|
||||
char file_name[128];
|
||||
|
||||
if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
|
||||
mlx5_core_warn(dev,
|
||||
"Steering dump is not supported for NIC RX/TX domains\n");
|
||||
return;
|
||||
}
|
||||
|
||||
dmn->dump_info.steering_debugfs =
|
||||
debugfs_create_dir("steering", dev->priv.dbg_root);
|
||||
dmn->dump_info.fdb_debugfs =
|
||||
debugfs_create_dir("fdb", dmn->dump_info.steering_debugfs);
|
||||
|
||||
sprintf(file_name, "dmn_%p", dmn);
|
||||
debugfs_create_file(file_name, 0444, dmn->dump_info.fdb_debugfs,
|
||||
dmn, &dr_dump_fops);
|
||||
|
||||
INIT_LIST_HEAD(&dmn->dbg_tbl_list);
|
||||
mutex_init(&dmn->dump_info.dbg_mutex);
|
||||
}
|
||||
|
||||
void mlx5dr_dbg_uninit_dump(struct mlx5dr_domain *dmn)
|
||||
{
|
||||
debugfs_remove_recursive(dmn->dump_info.steering_debugfs);
|
||||
mutex_destroy(&dmn->dump_info.dbg_mutex);
|
||||
}
|
15
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h
Normal file
15
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h
Normal file
@ -0,0 +1,15 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
|
||||
/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
|
||||
|
||||
struct mlx5dr_dbg_dump_info {
|
||||
struct mutex dbg_mutex; /* protect dbg lists */
|
||||
struct dentry *steering_debugfs;
|
||||
struct dentry *fdb_debugfs;
|
||||
};
|
||||
|
||||
void mlx5dr_dbg_init_dump(struct mlx5dr_domain *dmn);
|
||||
void mlx5dr_dbg_uninit_dump(struct mlx5dr_domain *dmn);
|
||||
void mlx5dr_dbg_tbl_add(struct mlx5dr_table *tbl);
|
||||
void mlx5dr_dbg_tbl_del(struct mlx5dr_table *tbl);
|
||||
void mlx5dr_dbg_rule_add(struct mlx5dr_rule *rule);
|
||||
void mlx5dr_dbg_rule_del(struct mlx5dr_rule *rule);
|
@ -395,7 +395,7 @@ mlx5dr_domain_create(struct mlx5_core_dev *mdev, enum mlx5dr_domain_type type)
|
||||
}
|
||||
|
||||
dr_domain_init_csum_recalc_fts(dmn);
|
||||
|
||||
mlx5dr_dbg_init_dump(dmn);
|
||||
return dmn;
|
||||
|
||||
uninit_caps:
|
||||
@ -436,6 +436,7 @@ int mlx5dr_domain_destroy(struct mlx5dr_domain *dmn)
|
||||
|
||||
/* make sure resources are not used by the hardware */
|
||||
mlx5dr_cmd_sync_steering(dmn->mdev);
|
||||
mlx5dr_dbg_uninit_dump(dmn);
|
||||
dr_domain_uninit_csum_recalc_fts(dmn);
|
||||
dr_domain_uninit_resources(dmn);
|
||||
dr_domain_caps_uninit(dmn);
|
||||
|
@ -969,6 +969,7 @@ mlx5dr_matcher_create(struct mlx5dr_table *tbl,
|
||||
matcher->match_criteria = match_criteria_enable;
|
||||
refcount_set(&matcher->refcount, 1);
|
||||
INIT_LIST_HEAD(&matcher->list_node);
|
||||
INIT_LIST_HEAD(&matcher->dbg_rule_list);
|
||||
|
||||
mlx5dr_domain_lock(tbl->dmn);
|
||||
|
||||
|
@ -5,11 +5,6 @@
|
||||
|
||||
#define DR_RULE_MAX_STE_CHAIN (DR_RULE_MAX_STES + DR_ACTION_MAX_STES)
|
||||
|
||||
struct mlx5dr_rule_action_member {
|
||||
struct mlx5dr_action *action;
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
static int dr_rule_append_to_miss_list(struct mlx5dr_ste_ctx *ste_ctx,
|
||||
struct mlx5dr_ste *new_last_ste,
|
||||
struct list_head *miss_list,
|
||||
@ -1003,6 +998,8 @@ static int dr_rule_destroy_rule(struct mlx5dr_rule *rule)
|
||||
{
|
||||
struct mlx5dr_domain *dmn = rule->matcher->tbl->dmn;
|
||||
|
||||
mlx5dr_dbg_rule_del(rule);
|
||||
|
||||
switch (dmn->type) {
|
||||
case MLX5DR_DOMAIN_TYPE_NIC_RX:
|
||||
dr_rule_destroy_rule_nic(rule, &rule->rx);
|
||||
@ -1257,6 +1254,8 @@ dr_rule_create_rule(struct mlx5dr_matcher *matcher,
|
||||
if (ret)
|
||||
goto remove_action_members;
|
||||
|
||||
INIT_LIST_HEAD(&rule->dbg_node);
|
||||
mlx5dr_dbg_rule_add(rule);
|
||||
return rule;
|
||||
|
||||
remove_action_members:
|
||||
|
@ -266,6 +266,8 @@ struct mlx5dr_table *mlx5dr_table_create(struct mlx5dr_domain *dmn, u32 level, u
|
||||
if (ret)
|
||||
goto uninit_tbl;
|
||||
|
||||
INIT_LIST_HEAD(&tbl->dbg_node);
|
||||
mlx5dr_dbg_tbl_add(tbl);
|
||||
return tbl;
|
||||
|
||||
uninit_tbl:
|
||||
@ -284,6 +286,7 @@ int mlx5dr_table_destroy(struct mlx5dr_table *tbl)
|
||||
if (refcount_read(&tbl->refcount) > 1)
|
||||
return -EBUSY;
|
||||
|
||||
mlx5dr_dbg_tbl_del(tbl);
|
||||
ret = dr_table_destroy_sw_owned_tbl(tbl);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
@ -11,6 +11,7 @@
|
||||
#include "lib/mlx5.h"
|
||||
#include "mlx5_ifc_dr.h"
|
||||
#include "mlx5dr.h"
|
||||
#include "dr_dbg.h"
|
||||
|
||||
#define DR_RULE_MAX_STES 18
|
||||
#define DR_ACTION_MAX_STES 5
|
||||
@ -878,6 +879,8 @@ struct mlx5dr_domain {
|
||||
struct mlx5dr_domain_info info;
|
||||
struct xarray csum_fts_xa;
|
||||
struct mlx5dr_ste_ctx *ste_ctx;
|
||||
struct list_head dbg_tbl_list;
|
||||
struct mlx5dr_dbg_dump_info dump_info;
|
||||
};
|
||||
|
||||
struct mlx5dr_table_rx_tx {
|
||||
@ -897,6 +900,7 @@ struct mlx5dr_table {
|
||||
struct list_head matcher_list;
|
||||
struct mlx5dr_action *miss_action;
|
||||
refcount_t refcount;
|
||||
struct list_head dbg_node;
|
||||
};
|
||||
|
||||
struct mlx5dr_matcher_rx_tx {
|
||||
@ -916,11 +920,12 @@ struct mlx5dr_matcher {
|
||||
struct mlx5dr_table *tbl;
|
||||
struct mlx5dr_matcher_rx_tx rx;
|
||||
struct mlx5dr_matcher_rx_tx tx;
|
||||
struct list_head list_node;
|
||||
struct list_head list_node; /* Used for both matchers and dbg managing */
|
||||
u32 prio;
|
||||
struct mlx5dr_match_param mask;
|
||||
u8 match_criteria;
|
||||
refcount_t refcount;
|
||||
struct list_head dbg_rule_list;
|
||||
};
|
||||
|
||||
struct mlx5dr_ste_action_modify_field {
|
||||
@ -992,6 +997,11 @@ struct mlx5dr_action_flow_tag {
|
||||
u32 flow_tag;
|
||||
};
|
||||
|
||||
struct mlx5dr_rule_action_member {
|
||||
struct mlx5dr_action *action;
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
struct mlx5dr_action {
|
||||
enum mlx5dr_action_type action_type;
|
||||
refcount_t refcount;
|
||||
@ -1032,6 +1042,7 @@ struct mlx5dr_rule {
|
||||
struct mlx5dr_rule_rx_tx rx;
|
||||
struct mlx5dr_rule_rx_tx tx;
|
||||
struct list_head rule_actions_list;
|
||||
struct list_head dbg_node;
|
||||
u32 flow_source;
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user