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amd-xgbe: Clear the proper MTL interrupt register

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When initializing the MTL interrupts the interrupt status
register is written to instead of the interrupt enable register.
Since no MTL interrupts are being enabled and the default state
is for MTL interrupts to be disabled this did not cause a problem,
but needs to be fixed to target the correct register.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Lendacky, Thomas 2014-07-02 13:04:34 -05:00 committed by David S. Miller
parent f3f128d40c
commit 91f873453b
1 changed files with 1 additions and 1 deletions
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2
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
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@ -486,7 +486,7 @@ static void xgbe_enable_mtl_interrupts(struct xgbe_prv_data *pdata)
XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, mtl_q_isr);
/* No MTL interrupts to be enabled */
XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, 0);
XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_IER, 0);
}
}