ARM: s3c24xx: remove support for ISA drivers on BAST PC/104

BAST is the one machine that theoretically supports unmodified ISA
drivers for hardware on its PC/104 connector, using a custom version of
the inb()/outb() and inw()/outw() macros.

This is incompatible with the generic version used in asm/io.h, and
can't easily be used in a multiplatform kernel.

Removing the special case for 16-bit I/O port access on BAST gets us
closer to multiplatform, at the expense of any PC/104 users with 16-bit
cards having to either use an older kernel or modify their ISA drivers
to manually ioremap() the area and use readw()/write() in place of
inw()/outw(). Either way is probably ok, given that there is a
recurring discussion about dropping s3c24xx altogether, and many
traditional ISA drivers are already gone.

Machines other than BAST already have no support for ISA drivers, though a
couple of them do map one of the external chip-selects into the ISA port
range, using the same address for 8-bit and 16-bit I/O. It is unlikely
that anything actually uses this mapping, but it's also easy to keep
this working by mapping it to the normal platform-independent PCI I/O
base that is otherwise unused on s3c24xx.

The mach/map-base.h file is no longer referenced in global headers and
can be moved into the platform directory.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-04-02 12:29:36 +02:00
parent 09f6b27d5d
commit 91276c0fa4
17 changed files with 10 additions and 120 deletions

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@ -444,7 +444,6 @@ config ARCH_S3C24XX
select CLKSRC_SAMSUNG_PWM
select GPIO_SAMSUNG
select GPIOLIB
select NEED_MACH_IO_H
select S3C2410_WATCHDOG
select SAMSUNG_ATAGS
select USE_OF

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@ -181,7 +181,6 @@ config MACH_AML_M5900
config ARCH_BAST
bool "Simtec Electronics BAST (EB2410ITX)"
select ISA
select MACH_BAST_IDE
select S3C2410_COMMON_DCLK
select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ

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@ -10,7 +10,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <mach/map-base.h>
#include "map-base.h"
#include "cpu.h"
unsigned long samsung_cpu_id;

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@ -1,50 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* arch/arm/mach-s3c2410/include/mach/io.h
* from arch/arm/mach-rpc/include/mach/io.h
*
* Copyright (C) 1997 Russell King
* (C) 2003 Simtec Electronics
*/
#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H
#define __ASM_ARM_ARCH_IO_S3C24XX_H
#include <mach/map-base.h>
/*
* ISA style IO, for each machine to sort out mappings for,
* if it implements it. We reserve two 16M regions for ISA,
* so the PC/104 can use separate addresses for 8-bit and
* 16-bit port I/O.
*/
#define PCIO_BASE S3C_ADDR(0x02000000)
#define IO_SPACE_LIMIT 0x00ffffff
#define S3C24XX_VA_ISA_WORD (PCIO_BASE)
#define S3C24XX_VA_ISA_BYTE (PCIO_BASE + 0x01000000)
#ifdef CONFIG_ISA
#define inb(p) readb(S3C24XX_VA_ISA_BYTE + (p))
#define inw(p) readw(S3C24XX_VA_ISA_WORD + (p))
#define inl(p) readl(S3C24XX_VA_ISA_WORD + (p))
#define outb(v,p) writeb((v), S3C24XX_VA_ISA_BYTE + (p))
#define outw(v,p) writew((v), S3C24XX_VA_ISA_WORD + (p))
#define outl(v,p) writel((v), S3C24XX_VA_ISA_WORD + (p))
#define insb(p,d,l) readsb(S3C24XX_VA_ISA_BYTE + (p),d,l)
#define insw(p,d,l) readsw(S3C24XX_VA_ISA_WORD + (p),d,l)
#define insl(p,d,l) readsl(S3C24XX_VA_ISA_WORD + (p),d,l)
#define outsb(p,d,l) writesb(S3C24XX_VA_ISA_BYTE + (p),d,l)
#define outsw(p,d,l) writesw(S3C24XX_VA_ISA_WORD + (p),d,l)
#define outsl(p,d,l) writesl(S3C24XX_VA_ISA_WORD + (p),d,l)
#else
#define __io(x) (PCIO_BASE + (x))
#endif
#endif

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@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2020 Krzysztof Kozlowski <krzk@kernel.org>
*/
#ifdef CONFIG_ARCH_S3C24XX
#include "io-s3c24xx.h"
#endif

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@ -15,7 +15,7 @@
#include "cpu.h"
#include "pm.h"
#include <mach/map-base.h>
#include "map-base.h"
#include "map-s3c.h"
#include "regs-irq.h"

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@ -57,11 +57,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
.pfn = __phys_to_pfn(0x0),
.length = SZ_4M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(0x0),
.length = SZ_4M,
.type = MT_DEVICE,
},
/* we could possibly compress the next set down into a set of smaller tables

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@ -75,11 +75,6 @@ static struct map_desc bast_iodesc[] __initdata = {
.pfn = PA_CS2(BAST_PA_ISAIO),
.length = SZ_16M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = PA_CS3(BAST_PA_ISAIO),
.length = SZ_16M,
.type = MT_DEVICE,
},
/* bast CPLD control registers, and external interrupt controls */
{

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@ -58,11 +58,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
.pfn = __phys_to_pfn(S3C2410_CS5),
.length = SZ_16M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS5),
.length = SZ_16M,
.type = MT_DEVICE,
},
/* CPLD control registers */

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@ -48,13 +48,7 @@
static struct map_desc rx3715_iodesc[] __initdata = {
/* dump ISA space somewhere unused */
{
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS3),
.length = SZ_1M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
.pfn = __phys_to_pfn(S3C2410_CS3),
.length = SZ_1M,

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@ -53,16 +53,6 @@ static struct map_desc smdk2416_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
{
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
.pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
.length = SZ_4M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,

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@ -43,16 +43,6 @@ static struct map_desc smdk2440_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
{
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
.pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
.length = SZ_4M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,

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@ -40,16 +40,6 @@ static struct map_desc smdk2443_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
{
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
.pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
.length = SZ_4M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,

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@ -67,11 +67,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
.pfn = PA_CS2(BAST_PA_ISAIO),
.length = SZ_16M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = PA_CS3(BAST_PA_ISAIO),
.length = SZ_16M,
.type = MT_DEVICE,
},
/* CPLD control registers, and external interrupt controls */

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@ -33,6 +33,12 @@
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
/* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O.
* 16-bit I/O on BAST now requires driver modifications to manually
* ioremap CS3.
*/
#define S3C24XX_VA_ISA_BYTE PCI_IOBASE
/* This is used for the CPU specific mappings that may be needed, so that
* they do not need to directly used S3C_ADDR() and thus make it easier to
* modify the space for mapping.

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@ -9,7 +9,7 @@
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H
#include <mach/map-base.h>
#include "map-base.h"
#include "map-s3c.h"
/*

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@ -11,7 +11,7 @@
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__
#include <mach/map-base.h>
#include "map-base.h"
#include "map-s3c.h"
/*