scsi: ufs: set load before setting voltage in regulators

This sequence change is required to avoid dips in voltage during boot-up.

Apparently, this dip is caused because in the original sequence, the
regulators are initialized in lpm mode.  And then when the load is set to
high, and more current is drawn, than is allowed in lpm, the dip is seen.

Link: https://lore.kernel.org/r/1581392451-28743-3-git-send-email-cang@codeaurora.org
Reviewed-by: Hongwu Su <hongwus@codeaurora.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Asutosh Das 2020-02-10 19:40:45 -08:00 committed by Martin K. Petersen
parent 2824ec9f9e
commit 90d88f47e8

View File

@ -7249,6 +7249,11 @@ static int ufshcd_config_vreg(struct device *dev,
name = vreg->name;
if (regulator_count_voltages(reg) > 0) {
uA_load = on ? vreg->max_uA : 0;
ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
if (ret)
goto out;
if (vreg->min_uV && vreg->max_uV) {
min_uV = on ? vreg->min_uV : 0;
ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
@ -7259,11 +7264,6 @@ static int ufshcd_config_vreg(struct device *dev,
goto out;
}
}
uA_load = on ? vreg->max_uA : 0;
ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
if (ret)
goto out;
}
out:
return ret;