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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] cdb89712: avoid namespace clashes with SRAM_ and BOOTROM_ constants
  [ARM] cdb89712,clps7500,h720x: avoid namespace clash for FLASH_* constants
  [ARM] integrator,realview,versatile: remove FLASH_* and EPROM_* constants
  [ARM] dma-mapping: fix compiler warning
  [ARM] iop: iop3xx needs registers mapped uncached+unbuffered
  [ARM] versatile: correct MMC clock rate
  [ARM] realview: correct MMC clock rate
  [ARM] 5329/1: Feroceon: fix feroceon_l2_inv_range
This commit is contained in:
Linus Torvalds 2008-11-13 11:30:25 -08:00
commit 90aaa53c5a
16 changed files with 57 additions and 101 deletions
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13
arch/arm/include/asm/dma-mapping.h
View File

@ -256,8 +256,17 @@ int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
size_t, enum dma_data_direction);
#else
#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1)
#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1)
static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
unsigned long offset, size_t size, enum dma_data_direction dir)
{
return 1;
}
static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
unsigned long offset, size_t size, enum dma_data_direction dir)
{
return 1;
}
/**

13
arch/arm/include/asm/mach/map.h
View File

@ -19,12 +19,13 @@ struct map_desc {
};
/* types 0-3 are defined in asm/io.h */
#define MT_CACHECLEAN 4
#define MT_MINICLEAN 5
#define MT_LOW_VECTORS 6
#define MT_HIGH_VECTORS 7
#define MT_MEMORY 8
#define MT_ROM 9
#define MT_UNCACHED 4
#define MT_CACHECLEAN 5
#define MT_MINICLEAN 6
#define MT_LOW_VECTORS 7
#define MT_HIGH_VECTORS 8
#define MT_MEMORY 9
#define MT_ROM 10
#ifdef CONFIG_MMU
extern void iotable_init(struct map_desc *, int);

22
arch/arm/mach-clps711x/include/mach/hardware.h
View File

@ -94,20 +94,6 @@
#include <asm/hardware/ep7212.h>
#include <asm/hardware/cs89712.h>
/* dynamic ioremap() areas */
#define FLASH_START 0x00000000
#define FLASH_SIZE 0x800000
#define FLASH_WIDTH 4
#define SRAM_START 0x60000000
#define SRAM_SIZE 0xc000
#define SRAM_WIDTH 4
#define BOOTROM_START 0x70000000
#define BOOTROM_SIZE 0x80
#define BOOTROM_WIDTH 4
/* static cdb89712_map_io() areas */
#define REGISTER_START 0x80000000
#define REGISTER_SIZE 0x4000
@ -198,14 +184,6 @@
#define CEIVA_FLASH_SIZE 0x100000
#define CEIVA_FLASH_WIDTH 2
#define SRAM_START 0x60000000
#define SRAM_SIZE 0xc000
#define SRAM_WIDTH 4
#define BOOTROM_START 0x70000000
#define BOOTROM_SIZE 0x80
#define BOOTROM_WIDTH 4
/*
* SED1355 LCD controller
*/

6
arch/arm/mach-clps7500/core.c
View File

@ -275,9 +275,9 @@ static struct map_desc cl7500_io_desc[] __initdata = {
.length = ISA_SIZE,
.type = MT_DEVICE
}, { /* Flash */
.virtual = FLASH_BASE,
.pfn = __phys_to_pfn(FLASH_START),
.length = FLASH_SIZE,
.virtual = CLPS7500_FLASH_BASE,
.pfn = __phys_to_pfn(CLPS7500_FLASH_START),
.length = CLPS7500_FLASH_SIZE,
.type = MT_DEVICE
}, { /* LED */
.virtual = LED_BASE,

6
arch/arm/mach-clps7500/include/mach/hardware.h
View File

@ -39,9 +39,9 @@
#define ISA_SIZE 0x00010000
#define ISA_BASE 0xe1000000
#define FLASH_START 0x01000000 /* XXX */
#define FLASH_SIZE 0x01000000
#define FLASH_BASE 0xe2000000
#define CLPS7500_FLASH_START 0x01000000 /* XXX */
#define CLPS7500_FLASH_SIZE 0x01000000
#define CLPS7500_FLASH_BASE 0xe2000000
#define LED_START 0x0302B000
#define LED_SIZE 0x00001000

6
arch/arm/mach-h720x/include/mach/boards.h
View File

@ -19,9 +19,9 @@
#ifdef CONFIG_ARCH_H7202
/* FLASH */
#define FLASH_VIRT 0xd0000000
#define FLASH_PHYS 0x00000000
#define FLASH_SIZE 0x02000000
#define H720X_FLASH_VIRT 0xd0000000
#define H720X_FLASH_PHYS 0x00000000
#define H720X_FLASH_SIZE 0x02000000
/* onboard LAN controller */
# define ETH0_PHYS 0x08000000

19
arch/arm/mach-integrator/include/mach/platform.h
View File

@ -407,28 +407,11 @@
*/
#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
/*
* Application Flash
*
*/
#define FLASH_BASE INTEGRATOR_FLASH_BASE
#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
#define FLASH_BLOCK_SIZE SZ_128K
/*
* Boot Flash
*
*/
#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI
#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE
#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
/*
* Clean base - dummy
*
*/
#define CLEAN_BASE EPROM_BASE
#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI
/*
* Timer definitions

2
arch/arm/mach-realview/clock.c
View File

@ -104,7 +104,7 @@ static struct clk uart_clk = {
static struct clk mmci_clk = {
.name = "MCLK",
.rate = 33000000,
.rate = 24000000,
};
int clk_register(struct clk *clk)

19
arch/arm/mach-realview/include/mach/platform.h
View File

@ -238,28 +238,11 @@
#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
/*
* Application Flash
*
*/
#define FLASH_BASE REALVIEW_FLASH_BASE
#define FLASH_SIZE REALVIEW_FLASH_SIZE
#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
#define FLASH_BLOCK_SIZE SZ_128K
/*
* Boot Flash
*
*/
#define EPROM_BASE REALVIEW_BOOT_ROM_HI
#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
/*
* Clean base - dummy
*
*/
#define CLEAN_BASE EPROM_BASE
#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
/*
* System controller bit assignment

2
arch/arm/mach-versatile/clock.c
View File

@ -105,7 +105,7 @@ static struct clk uart_clk = {
static struct clk mmci_clk = {
.name = "MCLK",
.rate = 33000000,
.rate = 24000000,
};
int clk_register(struct clk *clk)

18
arch/arm/mach-versatile/include/mach/platform.h
View File

@ -436,28 +436,12 @@
#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1)
#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2)
#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3)
/*
* Application Flash
*
*/
#define FLASH_BASE VERSATILE_FLASH_BASE
#define FLASH_SIZE VERSATILE_FLASH_SIZE
#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
#define FLASH_BLOCK_SIZE SZ_128K
/*
* Boot Flash
*
*/
#define EPROM_BASE VERSATILE_BOOT_ROM_HI
#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE
#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
/*
* Clean base - dummy
*
*/
#define CLEAN_BASE EPROM_BASE
#define CLEAN_BASE VERSATILE_BOOT_ROM_HI
/*
* System controller bit assignment

4
arch/arm/mm/cache-feroceon-l2.c
View File

@ -150,7 +150,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
/*
* Clean and invalidate partial last cache line.
*/
if (end & (CACHE_LINE_SIZE - 1)) {
if (start < end && end & (CACHE_LINE_SIZE - 1)) {
l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
end &= ~(CACHE_LINE_SIZE - 1);
}
@ -158,7 +158,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
/*
* Invalidate all full cache lines between 'start' and 'end'.
*/
while (start != end) {
while (start < end) {
unsigned long range_end = calc_range_end(start, end);
l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE);
start = range_end;

6
arch/arm/mm/mmu.c
View File

@ -208,6 +208,12 @@ static struct mem_type mem_types[] = {
.prot_sect = PROT_SECT_DEVICE,
.domain = DOMAIN_IO,
},
[MT_UNCACHED] = {
.prot_pte = PROT_PTE_DEVICE,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
.domain = DOMAIN_IO,
},
[MT_CACHECLEAN] = {
.prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
.domain = DOMAIN_KERNEL,

5
arch/arm/plat-iop/setup.c
View File

@ -16,14 +16,15 @@
#include <asm/hardware/iop3xx.h>
/*
* Standard IO mapping for all IOP3xx based systems
* Standard IO mapping for all IOP3xx based systems. Note that
* the IOP3xx OCCDR must be mapped uncached and unbuffered.
*/
static struct map_desc iop3xx_std_desc[] __initdata = {
{ /* mem mapped registers */
.virtual = IOP3XX_PERIPHERAL_VIRT_BASE,
.pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
.length = IOP3XX_PERIPHERAL_SIZE,
.type = MT_DEVICE,
.type = MT_UNCACHED,
}, { /* PCI IO space */
.virtual = IOP3XX_PCI_LOWER_IO_VA,
.pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),

11
drivers/mtd/maps/cdb89712.c
View File

@ -14,7 +14,18 @@
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
/* dynamic ioremap() areas */
#define FLASH_START 0x00000000
#define FLASH_SIZE 0x800000
#define FLASH_WIDTH 4
#define SRAM_START 0x60000000
#define SRAM_SIZE 0xc000
#define SRAM_WIDTH 4
#define BOOTROM_START 0x70000000
#define BOOTROM_SIZE 0x80
#define BOOTROM_WIDTH 4
static struct mtd_info *flash_mtd;

6
drivers/mtd/maps/h720x-flash.c
View File

@ -24,8 +24,8 @@ static struct mtd_info *mymtd;
static struct map_info h720x_map = {
.name = "H720X",
.bankwidth = 4,
.size = FLASH_SIZE,
.phys = FLASH_PHYS,
.size = H720X_FLASH_SIZE,
.phys = H720X_FLASH_PHYS,
};
static struct mtd_partition h720x_partitions[] = {
@ -70,7 +70,7 @@ int __init h720x_mtd_init(void)
char *part_type = NULL;
h720x_map.virt = ioremap(FLASH_PHYS, FLASH_SIZE);
h720x_map.virt = ioremap(h720x_map.phys, h720x_map.size);
if (!h720x_map.virt) {
printk(KERN_ERR "H720x-MTD: ioremap failed\n");