drm/amdgpu: add JPEG2.0 decode ring test
Use register from JPEG tile, the UVD tile reg won't work for JPEG Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -631,19 +631,17 @@ int amdgpu_vcn_jpeg_ring_test_ring(struct amdgpu_ring *ring)
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unsigned i;
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int r;
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WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9), 0xCAFEDEAD);
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WREG32(adev->vcn.external.jpeg_pitch, 0xCAFEDEAD);
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r = amdgpu_ring_alloc(ring, 3);
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if (r)
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return r;
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amdgpu_ring_write(ring,
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PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9), 0, 0, 0));
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amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.jpeg_pitch, 0));
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amdgpu_ring_write(ring, 0xDEADBEEF);
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amdgpu_ring_commit(ring);
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for (i = 0; i < adev->usec_timeout; i++) {
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tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9));
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tmp = RREG32(adev->vcn.external.jpeg_pitch);
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if (tmp == 0xDEADBEEF)
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break;
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DRM_UDELAY(1);
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@ -93,6 +93,7 @@ struct amdgpu_vcn_reg{
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unsigned cmd;
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unsigned nop;
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unsigned scratch9;
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unsigned jpeg_pitch;
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};
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struct amdgpu_vcn {
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@ -154,6 +154,8 @@ static int vcn_v1_0_sw_init(void *handle)
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return r;
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adev->vcn.pause_dpg_mode = vcn_v1_0_pause_dpg_mode;
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adev->vcn.internal.jpeg_pitch = adev->vcn.external.jpeg_pitch =
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SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_PITCH);
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return 0;
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}
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