ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates
Similarly to DRA7, OMAP5 has l3 and l4 clock rates incorrectly calculated. Fixed by using proper divider clock types for the clock nodes. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
cc824534d4
commit
8fd46439e1
@ -367,10 +367,12 @@
|
||||
|
||||
l3_iclk_div: l3_iclk_div {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
compatible = "ti,divider-clock";
|
||||
ti,max-div = <2>;
|
||||
ti,bit-shift = <4>;
|
||||
reg = <0x100>;
|
||||
clocks = <&dpll_core_h12x2_ck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <1>;
|
||||
ti,index-power-of-two;
|
||||
};
|
||||
|
||||
gpu_l3_iclk: gpu_l3_iclk {
|
||||
@ -383,10 +385,12 @@
|
||||
|
||||
l4_root_clk_div: l4_root_clk_div {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
compatible = "ti,divider-clock";
|
||||
ti,max-div = <2>;
|
||||
ti,bit-shift = <8>;
|
||||
reg = <0x100>;
|
||||
clocks = <&l3_iclk_div>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <1>;
|
||||
ti,index-power-of-two;
|
||||
};
|
||||
|
||||
slimbus1_slimbus_clk: slimbus1_slimbus_clk {
|
||||
|
Loading…
Reference in New Issue
Block a user