drm/i915/gvt: properly check per_ctx bb valid state
Need to check valid state for per_ctx bb and bypass batch buffer combine for scan if necessary. Otherwise adding invalid MI batch buffer start cmd for per_ctx bb will cause scan failure, which is taken as -EFAULT now so vGPU would be put in failsafe. This trys to fix that by checking per_ctx bb valid state. Also remove old invalid WARNING that indirect ctx bb shouldn't depend on valid per_ctx bb. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
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@ -2723,6 +2723,9 @@ static int combine_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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uint32_t per_ctx_start[CACHELINE_DWORDS] = {0};
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unsigned char *bb_start_sva;
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if (!wa_ctx->per_ctx.valid)
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return 0;
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per_ctx_start[0] = 0x18800001;
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per_ctx_start[1] = wa_ctx->per_ctx.guest_gma;
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@ -701,8 +701,7 @@ static int submit_context(struct intel_vgpu *vgpu, int ring_id,
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CACHELINE_BYTES;
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workload->wa_ctx.per_ctx.guest_gma =
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per_ctx & PER_CTX_ADDR_MASK;
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WARN_ON(workload->wa_ctx.indirect_ctx.size && !(per_ctx & 0x1));
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workload->wa_ctx.per_ctx.valid = per_ctx & 1;
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}
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if (emulate_schedule_in)
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@ -68,6 +68,7 @@ struct shadow_indirect_ctx {
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struct shadow_per_ctx {
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unsigned long guest_gma;
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unsigned long shadow_gma;
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unsigned valid;
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};
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struct intel_shadow_wa_ctx {
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