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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

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Pull ARM SoC late updates from Olof Johansson:
 "This is a branch with a few merge requests that either came in late,
  or took a while longer for us to review and merge than usual and thus
  cut it a bit close to the merge window. We stage them in a separate
  branch and if things look good, we still send them up -- and that's
  the case here.

  This is mostly DT additions for Renesas platforms, adding IP block
  descriptions for existing and new SoCs.

  There are also some driver updates for Qualcomm platforms for SMEM/QMI
  and GENI, which is their generalized serial protocol interface"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits)
  soc: qcom: smem: introduce qcom_smem_virt_to_phys()
  soc: qcom: qmi: fix a buffer sizing bug
  MAINTAINERS: Update pattern for qcom_scm
  soc: Unconditionally include qcom Makefile
  soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
  soc: qcom: smem: fix qcom_smem_set_global_partition()
  soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
  soc: qcom: smem: byte swap values properly
  soc: qcom: smem: return proper type for cached entry functions
  soc: qcom: smem: fix first cache entry calculation
  soc: qcom: cmd-db: Make endian-agnostic
  drivers: qcom: add command DB driver
  arm64: dts: renesas: salvator-common: Add ADV7482 support
  ARM: dts: r8a7740: Add CEU1
  ARM: dts: r8a7740: Add CEU0
  arm64: dts: renesas: salvator-common: enable VIN
  arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7795-es1: add CSI-2 node
  ...
This commit is contained in:
Linus Torvalds
2018-06-11 18:19:45 -07:00
parent 32bcbf8b6d 14321604c8
commit 8efcf34a26
68 changed files with 9374 additions and 3840 deletions
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45
include/soc/qcom/cmd-db.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. */
#ifndef __QCOM_COMMAND_DB_H__
#define __QCOM_COMMAND_DB_H__
enum cmd_db_hw_type {
CMD_DB_HW_INVALID = 0,
CMD_DB_HW_MIN = 3,
CMD_DB_HW_ARC = CMD_DB_HW_MIN,
CMD_DB_HW_VRM = 4,
CMD_DB_HW_BCM = 5,
CMD_DB_HW_MAX = CMD_DB_HW_BCM,
CMD_DB_HW_ALL = 0xff,
};
#if IS_ENABLED(CONFIG_QCOM_COMMAND_DB)
u32 cmd_db_read_addr(const char *resource_id);
int cmd_db_read_aux_data(const char *resource_id, u8 *data, size_t len);
size_t cmd_db_read_aux_data_len(const char *resource_id);
enum cmd_db_hw_type cmd_db_read_slave_id(const char *resource_id);
int cmd_db_ready(void);
#else
static inline u32 cmd_db_read_addr(const char *resource_id)
{ return 0; }
static inline int cmd_db_read_aux_data(const char *resource_id, u8 *data,
size_t len)
{ return -ENODEV; }
static inline size_t cmd_db_read_aux_data_len(const char *resource_id)
{ return -ENODEV; }
static inline enum cmd_db_hw_type cmd_db_read_slave_id(const char *resource_id)
{ return -ENODEV; }
static inline int cmd_db_ready(void)
{ return -ENODEV; }
#endif /* CONFIG_QCOM_COMMAND_DB */
#endif /* __QCOM_COMMAND_DB_H__ */