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drm/bridge/sii8620: simplify hardware reset procedure

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There is no need to flip reset pin twice. Also delays can be changed to
values present in vendor's code.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Maciej Purski <m.purski@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180608060457.18357-1-a.hajda@samsung.com
This commit is contained in:
Andrzej Hajda 2018-06-08 08:04:57 +02:00
parent 889ad63d41
commit 8efaac07d7
1 changed files with 10 additions and 13 deletions
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23
drivers/gpu/drm/bridge/sil-sii8620.c
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@ -971,8 +971,17 @@ static int sii8620_hw_on(struct sii8620 *ctx)
ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
if (ret)
return ret;
usleep_range(10000, 20000);
return clk_prepare_enable(ctx->clk_xtal);
ret = clk_prepare_enable(ctx->clk_xtal);
if (ret)
return ret;
msleep(100);
gpiod_set_value(ctx->gpio_reset, 0);
msleep(100);
return 0;
}
static int sii8620_hw_off(struct sii8620 *ctx)
@ -982,17 +991,6 @@ static int sii8620_hw_off(struct sii8620 *ctx)
return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
}
static void sii8620_hw_reset(struct sii8620 *ctx)
{
usleep_range(10000, 20000);
gpiod_set_value(ctx->gpio_reset, 0);
usleep_range(5000, 20000);
gpiod_set_value(ctx->gpio_reset, 1);
usleep_range(10000, 20000);
gpiod_set_value(ctx->gpio_reset, 0);
msleep(300);
}
static void sii8620_cbus_reset(struct sii8620 *ctx)
{
sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
@ -2112,7 +2110,6 @@ static void sii8620_cable_in(struct sii8620 *ctx)
dev_err(dev, "Error powering on, %d.\n", ret);
return;
}
sii8620_hw_reset(ctx);
sii8620_read_buf(ctx, REG_VND_IDL, ver, ARRAY_SIZE(ver));
ret = sii8620_clear_error(ctx);