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MIPS: Alchemy: pci: use clk framework to enable PCI clock

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Use the clock framework to get at the PCI clock source and enable
it on driver initialization.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7471/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss 2014-07-23 16:36:51 +02:00 committed by Ralf Baechle
parent 3feae78416
commit 8e21170581
1 changed files with 23 additions and 1 deletions
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24
arch/mips/pci/pci-alchemy.c
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@ -7,6 +7,7 @@
* Support for all devices (greater than 16) added by David Gathright. * Support for all devices (greater than 16) added by David Gathright.
*/ */
#include <linux/clk.h>
#include <linux/export.h> #include <linux/export.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/pci.h> #include <linux/pci.h>
@ -364,6 +365,7 @@ static int alchemy_pci_probe(struct platform_device *pdev)
void __iomem *virt_io; void __iomem *virt_io;
unsigned long val; unsigned long val;
struct resource *r; struct resource *r;
struct clk *c;
int ret; int ret;
/* need at least PCI IRQ mapping table */ /* need at least PCI IRQ mapping table */
@ -393,11 +395,24 @@ static int alchemy_pci_probe(struct platform_device *pdev)
goto out1; goto out1;
} }
c = clk_get(&pdev->dev, "pci_clko");
if (IS_ERR(c)) {
dev_err(&pdev->dev, "unable to find PCI clock\n");
ret = PTR_ERR(c);
goto out2;
}
ret = clk_prepare_enable(c);
if (ret) {
dev_err(&pdev->dev, "cannot enable PCI clock\n");
goto out6;
}
ctx->regs = ioremap_nocache(r->start, resource_size(r)); ctx->regs = ioremap_nocache(r->start, resource_size(r));
if (!ctx->regs) { if (!ctx->regs) {
dev_err(&pdev->dev, "cannot map pci regs\n"); dev_err(&pdev->dev, "cannot map pci regs\n");
ret = -ENODEV; ret = -ENODEV;
goto out2; goto out5;
} }
/* map parts of the PCI IO area */ /* map parts of the PCI IO area */
@ -465,12 +480,19 @@ static int alchemy_pci_probe(struct platform_device *pdev)
register_syscore_ops(&alchemy_pci_pmops); register_syscore_ops(&alchemy_pci_pmops);
register_pci_controller(&ctx->alchemy_pci_ctrl); register_pci_controller(&ctx->alchemy_pci_ctrl);
dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
clk_get_rate(c) / 1000000);
return 0; return 0;
out4: out4:
iounmap(virt_io); iounmap(virt_io);
out3: out3:
iounmap(ctx->regs); iounmap(ctx->regs);
out5:
clk_disable_unprepare(c);
out6:
clk_put(c);
out2: out2:
release_mem_region(r->start, resource_size(r)); release_mem_region(r->start, resource_size(r));
out1: out1: