forked from Minki/linux
clocksource: Exynos_mct: Register clock event after request_irq()
After hotplugging CPU1 the first call of interrupt handler for CPU1 oneshot timer was called on CPU0 because it fired before setting IRQ affinity. Affected are SoCs where Multi Core Timer interrupts are shared (SPI), e.g. Exynos 4210. During setup of the MCT timers the clock event device should be registered after setting the affinity for interrupt. This will prevent starting the timer too early. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com>, Cc: Daniel Lezcano <daniel.lezcano@linaro.org>, Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-arm-kernel@lists.infradead.org, Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/20140416143316.299247848@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -416,8 +416,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
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evt->set_mode = exynos4_tick_set_mode;
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evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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evt->rating = 450;
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clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
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0xf, 0x7fffffff);
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exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
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@ -434,6 +432,8 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
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} else {
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enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
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}
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clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
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0xf, 0x7fffffff);
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return 0;
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}
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