habanalabs: remove hwmgr.c
The two remaining functions in this file belong to firmware_if.c, as they communicate with the firmware. Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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drivers/misc/habanalabs
@ -11,4 +11,4 @@ HL_COMMON_FILES := common/habanalabs_drv.o common/device.o common/context.o \
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common/command_buffer.o common/hw_queue.o common/irq.o \
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common/sysfs.o common/hwmon.o common/memory.o \
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common/command_submission.o common/firmware_if.o \
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common/state_dump.o common/hwmgr.o
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common/state_dump.o
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2016-2021 HabanaLabs, Ltd.
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* Copyright 2016-2022 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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@ -2682,3 +2682,43 @@ int hl_fw_init_cpu(struct hl_device *hdev)
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hl_fw_dynamic_init_cpu(hdev, fw_loader) :
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hl_fw_static_init_cpu(hdev, fw_loader);
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}
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void hl_fw_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq)
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{
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hl_set_frequency(hdev, hdev->asic_prop.clk_pll_index,
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hdev->asic_prop.max_freq_value);
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}
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int hl_fw_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk)
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{
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long value;
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if (!hl_device_operational(hdev, NULL))
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return -ENODEV;
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if (!hdev->pdev) {
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*cur_clk = 0;
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*max_clk = 0;
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return 0;
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}
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value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, false);
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if (value < 0) {
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dev_err(hdev->dev, "Failed to retrieve device max clock %ld\n", value);
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return value;
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}
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*max_clk = (value / 1000 / 1000);
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value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, true);
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if (value < 0) {
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dev_err(hdev->dev, "Failed to retrieve device current clock %ld\n", value);
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return value;
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}
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*cur_clk = (value / 1000 / 1000);
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return 0;
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}
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@ -3120,8 +3120,8 @@ int hl_set_power(struct hl_device *hdev,
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int sensor_index, u32 attr, long value);
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int hl_get_power(struct hl_device *hdev,
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int sensor_index, u32 attr, long *value);
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int hl_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
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void hl_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq);
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int hl_fw_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
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void hl_fw_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq);
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void hl_sysfs_add_dev_clk_attr(struct hl_device *hdev, struct attribute_group *dev_attr_grp);
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void hw_sob_get(struct hl_hw_sob *hw_sob);
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void hw_sob_put(struct hl_hw_sob *hw_sob);
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@ -251,7 +251,7 @@ static int get_clk_rate(struct hl_device *hdev, struct hl_info_args *args)
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if ((!max_size) || (!out))
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return -EINVAL;
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rc = hl_get_clk_rate(hdev, &clk_rate.cur_clk_rate_mhz, &clk_rate.max_clk_rate_mhz);
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rc = hl_fw_get_clk_rate(hdev, &clk_rate.cur_clk_rate_mhz, &clk_rate.max_clk_rate_mhz);
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if (rc)
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return rc;
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@ -1,48 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2019-2021 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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#include "habanalabs.h"
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void hl_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq)
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{
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hl_set_frequency(hdev, hdev->asic_prop.clk_pll_index,
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hdev->asic_prop.max_freq_value);
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}
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int hl_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk)
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{
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long value;
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if (!hl_device_operational(hdev, NULL))
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return -ENODEV;
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if (!hdev->pdev) {
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*cur_clk = 0;
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*max_clk = 0;
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return 0;
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}
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value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, false);
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if (value < 0) {
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dev_err(hdev->dev, "Failed to retrieve device max clock %ld\n", value);
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return value;
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}
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*max_clk = (value / 1000 / 1000);
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value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, true);
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if (value < 0) {
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dev_err(hdev->dev, "Failed to retrieve device current clock %ld\n", value);
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return value;
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}
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*cur_clk = (value / 1000 / 1000);
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return 0;
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}
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@ -9363,7 +9363,7 @@ static const struct hl_asic_funcs gaudi_funcs = {
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.debugfs_read_dma = gaudi_debugfs_read_dma,
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.add_device_attr = hl_sysfs_add_dev_clk_attr,
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.handle_eqe = gaudi_handle_eqe,
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.set_pll_profile = hl_set_pll_profile,
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.set_pll_profile = hl_fw_set_pll_profile,
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.get_events_stat = gaudi_get_events_stat,
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.read_pte = gaudi_read_pte,
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.write_pte = gaudi_write_pte,
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