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ALSA: hda/tegra: Align BDL entry to 4KB boundary

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AZA HW may send a burst read/write request crossing 4K memory boundary.
The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to
include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K
boundary.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20220905172420.3801-1-mkumard@nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Mohan Kumar 2022-09-05 22:54:20 +05:30 committed by Takashi Iwai
parent 51bdc8bb82
commit 8d44e6044a
1 changed files with 2 additions and 1 deletions
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3
sound/pci/hda/hda_tegra.c
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@ -474,7 +474,8 @@ MODULE_DEVICE_TABLE(of, hda_tegra_match);
static int hda_tegra_probe(struct platform_device *pdev)
{
const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
AZX_DCAPS_PM_RUNTIME;
AZX_DCAPS_PM_RUNTIME |
AZX_DCAPS_4K_BDLE_BOUNDARY;
struct snd_card *card;
struct azx *chip;
struct hda_tegra *hda;