forked from Minki/linux
Merge branch 'RTL8211F-RGMII-RX-TX-delay-configuration-improvements'
Martin Blumenstingl says: ==================== RTL8211F: RGMII RX/TX delay configuration improvements In discussion with Andrew [0] we figured out that it would be best to make the RX delay of the RTL8211F PHY configurable (just like the TX delay is already configurable). While here I took the opportunity to add some logging to the TX delay configuration as well. There is no public documentation for the RX and TX delay registers. I received this information a while ago (and created this RfC patch back then: [1]). Realtek gave me permission to take the information from the datasheet extracts and phase them in my own words and publish that (I am not allowed to publish the datasheet extracts). I have tested these patches on two boards: - Amlogic Meson8b Odroid-C1 - Amlogic GXM Khadas VIM2 Both still behave as before these changes (iperf3 speeds are the same in both directions: RX and TX), which is expected because they are currently using phy-mode = "rgmii" with the RX delay not being generated by the PHY. [0] https://patchwork.ozlabs.org/patch/1215313/ [1] https://patchwork.ozlabs.org/patch/843946/ ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
8d34799298
@ -29,6 +29,8 @@
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#define RTL8211F_INSR 0x1d
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#define RTL8211F_TX_DELAY BIT(8)
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#define RTL8211F_RX_DELAY BIT(3)
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#define RTL8211E_TX_DELAY BIT(1)
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#define RTL8211E_RX_DELAY BIT(2)
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#define RTL8211E_MODE_MII_GMII BIT(3)
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@ -171,25 +173,66 @@ static int rtl8211c_config_init(struct phy_device *phydev)
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static int rtl8211f_config_init(struct phy_device *phydev)
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{
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u16 val;
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struct device *dev = &phydev->mdio.dev;
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u16 val_txdly, val_rxdly;
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int ret;
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/* enable TX-delay for rgmii-{id,txid}, and disable it for rgmii and
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* rgmii-rxid. The RX-delay can be enabled by the external RXDLY pin.
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*/
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switch (phydev->interface) {
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case PHY_INTERFACE_MODE_RGMII:
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val_txdly = 0;
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val_rxdly = 0;
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break;
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case PHY_INTERFACE_MODE_RGMII_RXID:
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val = 0;
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val_txdly = 0;
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val_rxdly = RTL8211F_RX_DELAY;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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val = RTL8211F_TX_DELAY;
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val_txdly = RTL8211F_TX_DELAY;
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val_rxdly = 0;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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val_txdly = RTL8211F_TX_DELAY;
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val_rxdly = RTL8211F_RX_DELAY;
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break;
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default: /* the rest of the modes imply leaving delay as is. */
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return 0;
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}
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return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val);
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ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,
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val_txdly);
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if (ret < 0) {
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dev_err(dev, "Failed to update the TX delay register\n");
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return ret;
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} else if (ret) {
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dev_dbg(dev,
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"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
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val_txdly ? "Enabling" : "Disabling");
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} else {
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dev_dbg(dev,
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"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
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val_txdly ? "enabled" : "disabled");
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}
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ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
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val_rxdly);
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if (ret < 0) {
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dev_err(dev, "Failed to update the RX delay register\n");
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return ret;
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} else if (ret) {
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dev_dbg(dev,
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"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
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val_rxdly ? "Enabling" : "Disabling");
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} else {
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dev_dbg(dev,
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"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
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val_rxdly ? "enabled" : "disabled");
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}
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return 0;
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}
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static int rtl8211e_config_init(struct phy_device *phydev)
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