drm/i915: refactor pll code out into intel_dpll.c
This pulls a large chunk of the pll calculation code out of intel_display.c to a new file. One function makes sense to be an inline, otherwise this is pretty much a straight copy cover. Also all the remaining hooks for g45 and older end up the same now. Signed-off-by: Dave Airlie <airlied@redhat.com> [Jani: cleaned up intel_dpll.h a bit, de-duped intel_panel_use_ssc().] Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/74b58e0572858b5d1734818ca594a23040d7d44f.1610622609.git.jani.nikula@intel.com
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@@ -202,6 +202,7 @@ i915-y += \
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display/intel_display.o \
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display/intel_display.o \
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display/intel_display_power.o \
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display/intel_display_power.o \
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display/intel_dpio_phy.o \
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display/intel_dpio_phy.o \
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display/intel_dpll.o \
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display/intel_dpll_mgr.o \
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display/intel_dpll_mgr.o \
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display/intel_dsb.o \
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display/intel_dsb.o \
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display/intel_fbc.o \
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display/intel_fbc.o \
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File diff suppressed because it is too large
Load Diff
@@ -651,6 +651,9 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
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int color_plane);
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int color_plane);
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int intel_plane_pin_fb(struct intel_plane_state *plane_state);
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int intel_plane_pin_fb(struct intel_plane_state *plane_state);
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void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
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void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
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struct intel_encoder *
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intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
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const struct intel_crtc_state *crtc_state);
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/* modesetting */
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/* modesetting */
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void intel_modeset_init_hw(struct drm_i915_private *i915);
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void intel_modeset_init_hw(struct drm_i915_private *i915);
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@@ -1839,4 +1839,17 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
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return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
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return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
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}
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}
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static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
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{
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if (dev_priv->params.panel_use_ssc >= 0)
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return dev_priv->params.panel_use_ssc != 0;
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return dev_priv->vbt.lvds_use_ssc
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&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
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}
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static inline u32 i9xx_dpll_compute_fp(struct dpll *dpll)
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{
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return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;
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}
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#endif /* __INTEL_DISPLAY_TYPES_H__ */
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#endif /* __INTEL_DISPLAY_TYPES_H__ */
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1363
drivers/gpu/drm/i915/display/intel_dpll.c
Normal file
1363
drivers/gpu/drm/i915/display/intel_dpll.c
Normal file
File diff suppressed because it is too large
Load Diff
23
drivers/gpu/drm/i915/display/intel_dpll.h
Normal file
23
drivers/gpu/drm/i915/display/intel_dpll.h
Normal file
@@ -0,0 +1,23 @@
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2020 Intel Corporation
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*/
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#ifndef _INTEL_DPLL_H_
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#define _INTEL_DPLL_H_
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struct dpll;
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struct drm_i915_private;
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struct intel_crtc;
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struct intel_crtc_state;
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void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
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int vlv_calc_dpll_params(int refclk, struct dpll *clock);
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int pnv_calc_dpll_params(int refclk, struct dpll *clock);
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int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
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void vlv_compute_dpll(struct intel_crtc *crtc,
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struct intel_crtc_state *pipe_config);
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void chv_compute_dpll(struct intel_crtc *crtc,
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struct intel_crtc_state *pipe_config);
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#endif
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