Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Ingo Molnar: "The main change in this tree is the addition of various new SoC clocksource/clockevents drivers: Conexant Digicolor SoCs, rockchip rk3288 board, asm9260 for MIPS and versatile AB/PB boards" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dts: versatile: Add sysregs node clocksource: versatile: Adapt for Versatile AB and PB boards dt/bindings: Add binding for Versatile system registers clocksource: Driver for Conexant Digicolor SoC timer clocksource: devicetree: Document Conexant Digicolor timer binding clockevents: rockchip: Add rockchip timer for rk3288 ARM: clocksource: Add asm9260_timer driver clocksource: marco: Rename marco to atlas7 clocksource: sirf: Remove unused variable
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18
Documentation/devicetree/bindings/timer/digicolor-timer.txt
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18
Documentation/devicetree/bindings/timer/digicolor-timer.txt
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Conexant Digicolor SoCs Timer Controller
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Required properties:
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- compatible : should be "cnxt,cx92755-timer"
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- reg : Specifies base physical address and size of the "Agent Communication"
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timer registers
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- interrupts : Contains 8 interrupts, one for each timer
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- clocks: phandle to the main clock
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Example:
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timer@f0000fc0 {
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compatible = "cnxt,cx92755-timer";
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reg = <0xf0000fc0 0x40>;
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interrupts = <19>, <31>, <34>, <35>, <52>, <53>, <54>, <55>;
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clocks = <&main_clk>;
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};
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Rockchip rk3288 timer
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Required properties:
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- compatible: shall be "rockchip,rk3288-timer"
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- reg: base address of the timer register starting with TIMERS CONTROL register
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- interrupts: should contain the interrupts for Timer0
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- clocks : must contain an entry for each entry in clock-names
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- clock-names : must include the following entries:
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"timer", "pclk"
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Example:
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timer: timer@ff810000 {
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compatible = "rockchip,rk3288-timer";
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reg = <0xff810000 0x20>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&xin24m>, <&cru PCLK_TIMER>;
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clock-names = "timer", "pclk";
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};
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