drm/komeda: Expose bus_width to Komeda-CORE
CHIP set bus_width according to the HW configuration, and CORE will use it as buffer alignment. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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@ -520,6 +520,7 @@ d71_identify(u32 __iomem *reg_base, struct komeda_chip_info *chip)
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chip->arch_id = malidp_read32(reg_base, GLB_ARCH_ID);
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chip->core_id = malidp_read32(reg_base, GLB_CORE_ID);
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chip->core_info = malidp_read32(reg_base, GLB_CORE_INFO);
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chip->bus_width = D71_BUS_WIDTH_16_BYTES;
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return &d71_chip_funcs;
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}
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@ -26,10 +26,10 @@ static int komeda_gem_cma_dumb_create(struct drm_file *file,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args)
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{
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u32 alignment = 16; /* TODO get alignment from dev */
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struct komeda_dev *mdev = dev->dev_private;
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u32 pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
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args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8),
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alignment);
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args->pitch = ALIGN(pitch, mdev->chip.bus_width);
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return drm_gem_cma_dumb_create_internal(file, dev, args);
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}
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