ASoC: rt5682: Add DAI clock binding info for WCLK/BCLK CCF usage

This patch describes that rt5682 can expose WCLK and BCLK clocks
and how to use.

Signed-off-by: Derek Fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/1582033912-6841-2-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Derek Fang 2020-02-18 21:51:52 +08:00 committed by Mark Brown
parent ebbfabc16d
commit 8b59e642d0
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@ -32,6 +32,12 @@ Optional properties:
The delay time is realtek,btndet-delay value multiple of 8.192 ms.
If absent, the default is 16.
- #clock-cells : Should be set to '<1>', wclk and bclk sources provided.
- clock-output-names : Name given for DAI clocks output.
- clocks : phandle and clock specifier for codec MCLK.
- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
Pins on the device (for linking into audio routes) for RT5682:
* DMIC L1
@ -53,4 +59,10 @@ rt5682 {
realtek,dmic1-clk-pin = <1>;
realtek,jd-src = <1>;
realtek,btndet-delay = <16>;
#clock-cells = <1>;
clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk";
clocks = <&osc>;
clock-names = "mclk";
};