Reset controller changes for v4.13
- Use devm_kcalloc to allocate the channels array in sti/reset-syscfg - Rename the TI_SYSCON_RESET Kconfig option to RESET_TI_SYSCON for consistency - Add new reset driver and DT bindings for Cortina Systems Gemini reset controller -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlkr4/IXHHAuemFiZWxA cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOt4tw/9GstbhBujV19tJC3g7qF5XgOg MWjwHlN2rWF+LWPVAVa/2t4ziM2emTHU/zNBxJiy3DpN6B8xcM/50kyQcBAdIO6l bXjlWQIeSSah7fGl0wlp7gPjQOXOeJsh9UbjV20Y2tBZ1P9Jc6szX0AtfHGXOYHR zSZuThZ0m8wme3CiR5ieX8K+vOP/H6XRnrKOLBJzEuVQDiIiZbIpDs0Iz5E6W/I2 dzX3mzFQHi5uX6GHhZYQr/CI8PX//LZs1bWg39zQWq2/tJnoJg3c9kmabsTH/wOx 7o4KphoChuXcIYiR01jCtaY3jVwvrAmxMV6Q5BD4B647zs82ruYy3gEUw9jhuk7J 4TlDDy9S1RKqHBhulBCJJeofOCCV3AU2IZp3BwqxH0y4VWaJc3Gk0CNacYXOu3YE wPyDCKrjW6+XeeHoxsTuiKKHAXlvk5I5jo8Qml8W+48y9tBTXCUG85rd1Q34TPGR GMSRaPmFR5Qc1LKLIISDeXQma/M9npNaWtYC9bH106VSyT9WDAOh/4CLpgGUjA7q M2VfBh88UqBhwt/JVc5YD8DnMy0lMD95F8TIDK1Nl1MuuqXL3mEGRHfDlODDbI/y qBR1nixJypM5YmHNT16Vml9gOZLwjIK13R2IPNh+2TxPCwf1EHhdGdC3rwwdHTKO oLue2QFZaxP1MxNYZQo= =fIPy -----END PGP SIGNATURE----- Merge tag 'reset-for-4.13' of git://git.pengutronix.de/git/pza/linux into next/drivers Reset controller changes for v4.13 - Use devm_kcalloc to allocate the channels array in sti/reset-syscfg - Rename the TI_SYSCON_RESET Kconfig option to RESET_TI_SYSCON for consistency - Add new reset driver and DT bindings for Cortina Systems Gemini reset controller * tag 'reset-for-4.13' of git://git.pengutronix.de/git/pza/linux: reset: Add a Gemini reset controller reset: add DT bindings header for Gemini reset controller reset: ti_syscon: Rename TI_SYSCON_RESET to RESET_TI_SYSCON reset: sti: Use devm_kcalloc() in syscfg_reset_controller_register() Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
8b4a35876d
@ -34,6 +34,13 @@ config RESET_BERLIN
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help
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This enables the reset controller driver for Marvell Berlin SoCs.
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config RESET_GEMINI
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bool "Gemini Reset Driver" if COMPILE_TEST
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default ARCH_GEMINI
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select MFD_SYSCON
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help
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This enables the reset controller driver for Cortina Systems Gemini.
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config RESET_IMX7
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bool "i.MX7 Reset Driver" if COMPILE_TEST
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default SOC_IMX7D
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@ -80,7 +87,7 @@ config RESET_SUNXI
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help
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This enables the reset driver for Allwinner SoCs.
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config TI_SYSCON_RESET
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config RESET_TI_SYSCON
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tristate "TI SYSCON Reset Driver"
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depends on HAS_IOMEM
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select MFD_SYSCON
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@ -5,6 +5,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
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obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
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obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
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obj-$(CONFIG_RESET_GEMINI) += reset-gemini.o
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obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
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obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
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obj-$(CONFIG_RESET_MESON) += reset-meson.o
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@ -13,7 +14,7 @@ obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_STM32) += reset-stm32.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_TI_SYSCON_RESET) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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110
drivers/reset/reset-gemini.c
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110
drivers/reset/reset-gemini.c
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@ -0,0 +1,110 @@
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/*
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* Cortina Gemini Reset controller driver
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* Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <dt-bindings/reset/cortina,gemini-reset.h>
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/**
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* struct gemini_reset - gemini reset controller
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* @map: regmap to access the containing system controller
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* @rcdev: reset controller device
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*/
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struct gemini_reset {
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struct regmap *map;
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struct reset_controller_dev rcdev;
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};
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#define GEMINI_GLOBAL_SOFT_RESET 0x0c
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#define to_gemini_reset(p) \
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container_of((p), struct gemini_reset, rcdev)
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/*
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* This is a self-deasserting reset controller.
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*/
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static int gemini_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct gemini_reset *gr = to_gemini_reset(rcdev);
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/* Manual says to always set BIT 30 (CPU1) to 1 */
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return regmap_write(gr->map,
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GEMINI_GLOBAL_SOFT_RESET,
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BIT(GEMINI_RESET_CPU1) | BIT(id));
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}
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static int gemini_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct gemini_reset *gr = to_gemini_reset(rcdev);
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u32 val;
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int ret;
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ret = regmap_read(gr->map, GEMINI_GLOBAL_SOFT_RESET, &val);
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if (ret)
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return ret;
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return !!(val & BIT(id));
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}
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static const struct reset_control_ops gemini_reset_ops = {
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.reset = gemini_reset,
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.status = gemini_reset_status,
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};
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static int gemini_reset_probe(struct platform_device *pdev)
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{
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struct gemini_reset *gr;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int ret;
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gr = devm_kzalloc(dev, sizeof(*gr), GFP_KERNEL);
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if (!gr)
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return -ENOMEM;
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gr->map = syscon_node_to_regmap(np);
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if (IS_ERR(gr->map)) {
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ret = PTR_ERR(gr->map);
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dev_err(dev, "unable to get regmap (%d)", ret);
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return ret;
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}
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gr->rcdev.owner = THIS_MODULE;
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gr->rcdev.nr_resets = 32;
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gr->rcdev.ops = &gemini_reset_ops;
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gr->rcdev.of_node = pdev->dev.of_node;
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ret = devm_reset_controller_register(&pdev->dev, &gr->rcdev);
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if (ret)
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return ret;
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dev_info(dev, "registered Gemini reset controller\n");
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return 0;
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}
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static const struct of_device_id gemini_reset_dt_ids[] = {
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{ .compatible = "cortina,gemini-syscon", },
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{ /* sentinel */ },
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};
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static struct platform_driver gemini_reset_driver = {
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.probe = gemini_reset_probe,
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.driver = {
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.name = "gemini-reset",
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.of_match_table = gemini_reset_dt_ids,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(gemini_reset_driver);
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@ -145,16 +145,14 @@ static int syscfg_reset_controller_register(struct device *dev,
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const struct syscfg_reset_controller_data *data)
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{
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struct syscfg_reset_controller *rc;
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size_t size;
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int i, err;
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rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
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if (!rc)
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return -ENOMEM;
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size = sizeof(struct syscfg_reset_channel) * data->nr_channels;
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rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
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rc->channels = devm_kcalloc(dev, data->nr_channels,
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sizeof(*rc->channels), GFP_KERNEL);
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if (!rc->channels)
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return -ENOMEM;
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36
include/dt-bindings/reset/cortina,gemini-reset.h
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36
include/dt-bindings/reset/cortina,gemini-reset.h
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@ -0,0 +1,36 @@
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#ifndef _DT_BINDINGS_RESET_CORTINA_GEMINI_H
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#define _DT_BINDINGS_RESET_CORTINA_GEMINI_H
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#define GEMINI_RESET_DRAM 0
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#define GEMINI_RESET_FLASH 1
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#define GEMINI_RESET_IDE 2
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#define GEMINI_RESET_RAID 3
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#define GEMINI_RESET_SECURITY 4
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#define GEMINI_RESET_GMAC0 5
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#define GEMINI_RESET_GMAC1 6
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#define GEMINI_RESET_PCI 7
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#define GEMINI_RESET_USB0 8
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#define GEMINI_RESET_USB1 9
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#define GEMINI_RESET_DMAC 10
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#define GEMINI_RESET_APB 11
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#define GEMINI_RESET_LPC 12
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#define GEMINI_RESET_LCD 13
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#define GEMINI_RESET_INTCON0 14
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#define GEMINI_RESET_INTCON1 15
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#define GEMINI_RESET_RTC 16
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#define GEMINI_RESET_TIMER 17
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#define GEMINI_RESET_UART 18
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#define GEMINI_RESET_SSP 19
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#define GEMINI_RESET_GPIO0 20
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#define GEMINI_RESET_GPIO1 21
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#define GEMINI_RESET_GPIO2 22
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#define GEMINI_RESET_WDOG 23
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#define GEMINI_RESET_EXTERN 24
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#define GEMINI_RESET_CIR 25
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#define GEMINI_RESET_SATA0 26
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#define GEMINI_RESET_SATA1 27
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#define GEMINI_RESET_TVC 28
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#define GEMINI_RESET_CPU1 30
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#define GEMINI_RESET_GLOBAL 31
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#endif
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