forked from Minki/linux
powerpc/perf: Pass the struct perf_events down to compute_mmcr()
To support per-event exclude settings on Power8 we need access to the struct perf_events in compute_mmcr(). Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -19,6 +19,8 @@
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#define MAX_EVENT_ALTERNATIVES 8
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#define MAX_LIMITED_HWCOUNTERS 2
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struct perf_event;
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/*
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* This struct provides the constants and functions needed to
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* describe the PMU on a particular POWER-family CPU.
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@ -30,7 +32,8 @@ struct power_pmu {
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unsigned long add_fields;
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unsigned long test_adder;
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int (*compute_mmcr)(u64 events[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[]);
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unsigned int hwc[], unsigned long mmcr[],
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struct perf_event *pevents[]);
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int (*get_constraint)(u64 event_id, unsigned long *mskp,
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unsigned long *valp);
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int (*get_alternatives)(u64 event_id, unsigned int flags,
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@ -1224,7 +1224,7 @@ static void power_pmu_enable(struct pmu *pmu)
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memset(cpuhw->mmcr, 0, sizeof(cpuhw->mmcr));
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if (ppmu->compute_mmcr(cpuhw->events, cpuhw->n_events, hwc_index,
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cpuhw->mmcr)) {
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cpuhw->mmcr, cpuhw->event)) {
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/* shouldn't ever get here */
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printk(KERN_ERR "oops compute_mmcr failed\n");
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goto out;
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@ -260,8 +260,9 @@ static const u32 pmcsel_mask[N_COUNTER] = {
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/*
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* Compute MMCR0/1/2 values for a set of events.
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*/
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static int mpc7450_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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static int mpc7450_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[],
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unsigned long mmcr[],
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struct perf_event *pevents[])
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{
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u8 event_index[N_CLASSES][N_COUNTER];
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int n_classevent[N_CLASSES];
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@ -356,7 +356,7 @@ static int p4_get_alternatives(u64 event, unsigned int flags, u64 alt[])
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}
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static int p4_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0;
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unsigned int pmc, unit, byte, psel, lower;
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@ -452,7 +452,7 @@ static int power5p_marked_instr_event(u64 event)
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}
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static int power5p_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = 0;
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@ -383,7 +383,7 @@ static int power5_marked_instr_event(u64 event)
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}
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static int power5_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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@ -175,7 +175,7 @@ static int power6_marked_instr_event(u64 event)
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* Assign PMC numbers and compute MMCR1 value for a set of events
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*/
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static int p6_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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@ -245,7 +245,7 @@ static int power7_marked_instr_event(u64 event)
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}
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static int power7_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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@ -393,7 +393,8 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long
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}
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static int power8_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[],
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struct perf_event *pevents[])
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{
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unsigned long mmcra, mmcr1, unit, combine, psel, cache, val;
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unsigned int pmc, pmc_inuse;
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@ -257,7 +257,7 @@ static int p970_get_alternatives(u64 event, unsigned int flags, u64 alt[])
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}
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static int p970_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
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{
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unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0;
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unsigned int pmc, unit, byte, psel;
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