forked from Minki/linux
perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore support
Previously, the MSR uncore for the Ice Lake and Tiger Lake are identical. The code path is shared. However, with recent update, the global MSR_UNC_PERF_GLOBAL_CTRL register and ARB uncore unit are changed for the Ice Lake. Split the Ice Lake and Tiger Lake MSR uncore support. The changes only impact the MSR ops() and the ARB uncore unit. Other codes can still be shared between the Ice Lake and the Tiger Lake. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200925134905.8839-1-kan.liang@linux.intel.com
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@ -1627,12 +1627,12 @@ static const struct intel_uncore_init_fun icl_uncore_init __initconst = {
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};
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static const struct intel_uncore_init_fun tgl_uncore_init __initconst = {
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.cpu_init = icl_uncore_cpu_init,
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.cpu_init = tgl_uncore_cpu_init,
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.mmio_init = tgl_uncore_mmio_init,
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};
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static const struct intel_uncore_init_fun tgl_l_uncore_init __initconst = {
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.cpu_init = icl_uncore_cpu_init,
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.cpu_init = tgl_uncore_cpu_init,
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.mmio_init = tgl_l_uncore_mmio_init,
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};
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@ -568,6 +568,7 @@ void snb_uncore_cpu_init(void);
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void nhm_uncore_cpu_init(void);
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void skl_uncore_cpu_init(void);
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void icl_uncore_cpu_init(void);
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void tgl_uncore_cpu_init(void);
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void tgl_uncore_mmio_init(void);
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void tgl_l_uncore_mmio_init(void);
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int snb_pci2phy_map_init(int devid);
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@ -377,6 +377,22 @@ void icl_uncore_cpu_init(void)
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snb_uncore_arb.ops = &skl_uncore_msr_ops;
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}
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static struct intel_uncore_type *tgl_msr_uncores[] = {
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&icl_uncore_cbox,
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&snb_uncore_arb,
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&icl_uncore_clockbox,
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NULL,
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};
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void tgl_uncore_cpu_init(void)
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{
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uncore_msr_uncores = tgl_msr_uncores;
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icl_uncore_cbox.num_boxes = icl_get_cbox_num();
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icl_uncore_cbox.ops = &skl_uncore_msr_ops;
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icl_uncore_clockbox.ops = &skl_uncore_msr_ops;
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snb_uncore_arb.ops = &skl_uncore_msr_ops;
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}
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enum {
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SNB_PCI_UNCORE_IMC,
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};
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