forked from Minki/linux
ARM: Keystone DTS update for 4.11
Brief: - MSM RAM node support for the Keystone 2 SOCs. - PSC node & reset controller node support for keystone 2 SOCs. - da830 UART node support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYg+ScAAoJEHJsHOdBp5c/9kwQAI9IB6Z2AuLex5wCIR63MYMQ A2sYFRDBhOQJanlZM9oS9buX1sT0N9CKjIPHm2x3d7K7ouPoiy5NPDWV/LZEpuQz xcisTVCiHTDgzJVcLKq08/dkB/BVT8TVcPXMCy8YYsxj0mhUTUQEv9FiBNP5cHYF 7mMIrsAkMoScxftItdWDDx1ZBrRsoSUTUNJpuwRCsJqbw/Tb91alfjH3604nkvV9 zUHYCFS1h7464XLxlOV8bI8q1UieW9M2KfhiDGujMQcdwzrjbAtAG0tcxJEBRFnz tywWNDYEv64oPKvzJ4urW6rpxgqj5D4LZdNdaxvtX6LIRdX2qlOSf2RbjDkJCE9b HEm6Ecog6pQSgakiJi1YaBPTC63wu7hpTnbOeLIZlWjIfxvhpSMtng/H4PN/cgk5 /UP/ccaxcVJBs4fJuDIt2fVt67m2+dgR89XwKtOEhoHakYoZ5FDsh/ZpgSZBB1m6 Z9BYRZVcgc+OKQhI83oaS4PP8gyetqnAuc8emCJdPP7n5sQqjXCafiowURCEpCG8 VyunxJU6n690oLH4YUKEHnXkQOBX+NKu0vELzpy5KaFXKx53mG8l+LDwSqEncQ+K /kFPAoax3ZdI9BGP7cp8OV0wYEGT2N4MyQ5+XJ3bAn8ACEgT69/kRW41SkBJ8GXT N2Doguf2jP+KP6fmvWcy =ElOC -----END PGP SIGNATURE----- Merge tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt ARM: Keystone DTS update for 4.11 Brief: - MSM RAM node support for the Keystone 2 SOCs. - PSC node & reset controller node support for keystone 2 SOCs. - da830 UART node support. * tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone-k2e: Add PSC reset controller node ARM: dts: keystone-k2l: Add PSC reset controller node ARM: dts: keystone-k2hk: Add PSC reset controller node ARM: dts: keystone: Add PSC node ARM: keystone: dts: fix netcp clocks and add names ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor ARM: dts: keystone-k2g: Add MSM RAM node ARM: dts: keystone-k2e: Add MSM RAM node ARM: dts: keystone-k2l: Add MSM RAM node ARM: dts: keystone-k2hk: Add MSM RAM node ARM: dts: keystone: Add "ti,da830-uart" compatible string Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
89f6ce1be2
@ -138,7 +138,8 @@ netcp: netcp@24000000 {
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/* NetCP address range */
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ranges = <0 0x24000000 0x1000000>;
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clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
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clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
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clock-names = "pa_clk", "ethss_clk", "cpts";
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dma-coherent;
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ti,navigator-dmas = <&dma_gbe 0>,
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@ -8,6 +8,8 @@
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/reset/ti-syscon.h>
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/ {
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compatible = "ti,k2e", "ti,keystone";
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model = "Texas Instruments Keystone 2 Edison SoC";
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@ -82,6 +84,29 @@
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};
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};
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msm_ram: msmram@0c000000 {
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compatible = "mmio-sram";
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reg = <0x0c000000 0x200000>;
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ranges = <0x0 0x0c000000 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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sram-bm@1f0000 {
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reg = <0x001f0000 0x8000>;
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};
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};
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psc: power-sleep-controller@02350000 {
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pscrst: reset-controller {
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compatible = "ti,k2e-pscrst", "ti,syscon-reset";
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#reset-cells = <1>;
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ti,reset-bits = <
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0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
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>;
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};
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};
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dspgpio0: keystone_dsp_gpio@02620240 {
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compatible = "ti,keystone-dsp-gpio";
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gpio-controller;
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@ -77,6 +77,18 @@
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ranges = <0x0 0x0 0x0 0xc0000000>;
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dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
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msm_ram: msmram@0c000000 {
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compatible = "mmio-sram";
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reg = <0x0c000000 0x100000>;
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ranges = <0x0 0x0c000000 0x100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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sram-bm@f7000 {
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reg = <0x000f7000 0x8000>;
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};
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};
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k2g_pinctrl: pinmux@02621000 {
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compatible = "pinctrl-single";
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reg = <0x02621000 0x410>;
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@ -90,7 +102,7 @@
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};
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uart0: serial@02530c00 {
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compatible = "ns16550a";
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -155,7 +155,8 @@ netcp: netcp@2000000 {
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/* NetCP address range */
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ranges = <0 0x2000000 0x100000>;
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clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
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clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
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clock-names = "pa_clk", "ethss_clk", "cpts";
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dma-coherent;
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ti,navigator-dmas = <&dma_gbe 22>,
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@ -8,6 +8,8 @@
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/reset/ti-syscon.h>
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/ {
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compatible = "ti,k2hk", "ti,keystone";
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model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
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@ -46,6 +48,36 @@
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soc {
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/include/ "keystone-k2hk-clocks.dtsi"
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msm_ram: msmram@0c000000 {
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compatible = "mmio-sram";
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reg = <0x0c000000 0x600000>;
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ranges = <0x0 0x0c000000 0x600000>;
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#address-cells = <1>;
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#size-cells = <1>;
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sram-bm@5f0000 {
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reg = <0x5f0000 0x8000>;
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};
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};
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psc: power-sleep-controller@02350000 {
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pscrst: reset-controller {
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compatible = "ti,k2hk-pscrst", "ti,syscon-reset";
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#reset-cells = <1>;
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ti,reset-bits = <
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0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
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0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
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0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
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0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
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0xa4c 8 0xa4c 8 0x84c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 4: dsp4 */
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0xa50 8 0xa50 8 0x850 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 5: dsp5 */
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0xa54 8 0xa54 8 0x854 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 6: dsp6 */
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0xa58 8 0xa58 8 0x858 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 7: dsp7 */
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>;
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};
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};
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dspgpio0: keystone_dsp_gpio@02620240 {
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compatible = "ti,keystone-dsp-gpio";
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gpio-controller;
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@ -137,7 +137,8 @@ netcp: netcp@26000000 {
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/* NetCP address range */
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ranges = <0 0x26000000 0x1000000>;
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clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
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clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>, <&clkosr>;
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clock-names = "pa_clk", "ethss_clk", "cpts", "osr_clk";
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dma-coherent;
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ti,navigator-dmas = <&dma_gbe 0>,
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@ -8,6 +8,8 @@
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/reset/ti-syscon.h>
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/ {
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compatible = "ti,k2l", "ti,keystone";
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model = "Texas Instruments Keystone 2 Lamarr SoC";
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@ -35,7 +37,7 @@
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/include/ "keystone-k2l-clocks.dtsi"
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uart2: serial@02348400 {
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compatible = "ns16550a";
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -45,7 +47,7 @@
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};
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uart3: serial@02348800 {
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compatible = "ns16550a";
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -204,6 +206,32 @@
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};
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};
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msm_ram: msmram@0c000000 {
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compatible = "mmio-sram";
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reg = <0x0c000000 0x200000>;
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ranges = <0x0 0x0c000000 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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sram-bm@1f8000 {
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reg = <0x001f8000 0x8000>;
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};
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};
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psc: power-sleep-controller@02350000 {
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pscrst: reset-controller {
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compatible = "ti,k2l-pscrst", "ti,syscon-reset";
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#reset-cells = <1>;
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ti,reset-bits = <
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0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
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0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
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0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
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0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
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>;
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};
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};
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dspgpio0: keystone_dsp_gpio@02620240 {
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compatible = "ti,keystone-dsp-gpio";
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gpio-controller;
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@ -83,6 +83,11 @@
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reg = <0x02310000 0x200>;
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};
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psc: power-sleep-controller@02350000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x02350000 0x1000>;
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};
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devctrl: device-state-control@02620000 {
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compatible = "ti,keystone-devctrl", "syscon";
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reg = <0x02620000 0x1000>;
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@ -98,7 +103,7 @@
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/include/ "keystone-clocks.dtsi"
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uart0: serial@02530c00 {
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compatible = "ns16550a";
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -108,7 +113,7 @@
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};
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uart1: serial@02531000 {
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compatible = "ns16550a";
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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