ARM: Keystone DTS update for 4.11

Brief:
 	- MSM RAM node support for the Keystone 2 SOCs.
 	- PSC node & reset controller node support for keystone 2 SOCs.
 	- da830 UART node support.
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Merge tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

ARM: Keystone DTS update for 4.11

Brief:
	- MSM RAM node support for the Keystone 2 SOCs.
	- PSC node & reset controller node support for keystone 2 SOCs.
	- da830 UART node support.

* tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone-k2e: Add PSC reset controller node
  ARM: dts: keystone-k2l: Add PSC reset controller node
  ARM: dts: keystone-k2hk: Add PSC reset controller node
  ARM: dts: keystone: Add PSC node
  ARM: keystone: dts: fix netcp clocks and add names
  ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2g: Add MSM RAM node
  ARM: dts: keystone-k2e: Add MSM RAM node
  ARM: dts: keystone-k2l: Add MSM RAM node
  ARM: dts: keystone-k2hk: Add MSM RAM node
  ARM: dts: keystone: Add "ti,da830-uart" compatible string

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-01-29 14:45:17 -08:00
commit 89f6ce1be2
8 changed files with 113 additions and 8 deletions

View File

@ -138,7 +138,8 @@ netcp: netcp@24000000 {
/* NetCP address range */
ranges = <0 0x24000000 0x1000000>;
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
clock-names = "pa_clk", "ethss_clk", "cpts";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,

View File

@ -8,6 +8,8 @@
* published by the Free Software Foundation.
*/
#include <dt-bindings/reset/ti-syscon.h>
/ {
compatible = "ti,k2e", "ti,keystone";
model = "Texas Instruments Keystone 2 Edison SoC";
@ -82,6 +84,29 @@
};
};
msm_ram: msmram@0c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x200000>;
ranges = <0x0 0x0c000000 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
sram-bm@1f0000 {
reg = <0x001f0000 0x8000>;
};
};
psc: power-sleep-controller@02350000 {
pscrst: reset-controller {
compatible = "ti,k2e-pscrst", "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
>;
};
};
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
gpio-controller;

View File

@ -77,6 +77,18 @@
ranges = <0x0 0x0 0x0 0xc0000000>;
dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
msm_ram: msmram@0c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x100000>;
ranges = <0x0 0x0c000000 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
sram-bm@f7000 {
reg = <0x000f7000 0x8000>;
};
};
k2g_pinctrl: pinmux@02621000 {
compatible = "pinctrl-single";
reg = <0x02621000 0x410>;
@ -90,7 +102,7 @@
};
uart0: serial@02530c00 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;

View File

@ -155,7 +155,8 @@ netcp: netcp@2000000 {
/* NetCP address range */
ranges = <0 0x2000000 0x100000>;
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
clock-names = "pa_clk", "ethss_clk", "cpts";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 22>,

View File

@ -8,6 +8,8 @@
* published by the Free Software Foundation.
*/
#include <dt-bindings/reset/ti-syscon.h>
/ {
compatible = "ti,k2hk", "ti,keystone";
model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
@ -46,6 +48,36 @@
soc {
/include/ "keystone-k2hk-clocks.dtsi"
msm_ram: msmram@0c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x600000>;
ranges = <0x0 0x0c000000 0x600000>;
#address-cells = <1>;
#size-cells = <1>;
sram-bm@5f0000 {
reg = <0x5f0000 0x8000>;
};
};
psc: power-sleep-controller@02350000 {
pscrst: reset-controller {
compatible = "ti,k2hk-pscrst", "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
0xa4c 8 0xa4c 8 0x84c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 4: dsp4 */
0xa50 8 0xa50 8 0x850 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 5: dsp5 */
0xa54 8 0xa54 8 0x854 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 6: dsp6 */
0xa58 8 0xa58 8 0x858 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 7: dsp7 */
>;
};
};
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
gpio-controller;

View File

@ -137,7 +137,8 @@ netcp: netcp@26000000 {
/* NetCP address range */
ranges = <0 0x26000000 0x1000000>;
clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>, <&clkosr>;
clock-names = "pa_clk", "ethss_clk", "cpts", "osr_clk";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,

View File

@ -8,6 +8,8 @@
* published by the Free Software Foundation.
*/
#include <dt-bindings/reset/ti-syscon.h>
/ {
compatible = "ti,k2l", "ti,keystone";
model = "Texas Instruments Keystone 2 Lamarr SoC";
@ -35,7 +37,7 @@
/include/ "keystone-k2l-clocks.dtsi"
uart2: serial@02348400 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@ -45,7 +47,7 @@
};
uart3: serial@02348800 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@ -204,6 +206,32 @@
};
};
msm_ram: msmram@0c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x200000>;
ranges = <0x0 0x0c000000 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
sram-bm@1f8000 {
reg = <0x001f8000 0x8000>;
};
};
psc: power-sleep-controller@02350000 {
pscrst: reset-controller {
compatible = "ti,k2l-pscrst", "ti,syscon-reset";
#reset-cells = <1>;
ti,reset-bits = <
0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
>;
};
};
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
gpio-controller;

View File

@ -83,6 +83,11 @@
reg = <0x02310000 0x200>;
};
psc: power-sleep-controller@02350000 {
compatible = "syscon", "simple-mfd";
reg = <0x02350000 0x1000>;
};
devctrl: device-state-control@02620000 {
compatible = "ti,keystone-devctrl", "syscon";
reg = <0x02620000 0x1000>;
@ -98,7 +103,7 @@
/include/ "keystone-clocks.dtsi"
uart0: serial@02530c00 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@ -108,7 +113,7 @@
};
uart1: serial@02531000 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;