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ARCv2: Adhere to Zero Delay loop restriction

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Branch insn can't be scheduled as last insn of Zero Overhead loop

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta
2013-10-07 18:10:08 +05:30
parent 1f7e3dc0ba
commit 8922bc3058
3 changed files with 41 additions and 15 deletions
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17
arch/arc/include/asm/uaccess.h
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@@ -659,31 +659,30 @@ static inline unsigned long __arc_clear_user(void __user *to, unsigned long n)
static inline long
__arc_strncpy_from_user(char *dst, const char __user *src, long count)
{
long res = count;
long res = 0;
char val;
unsigned int hw_count;
if (count == 0)
return 0;
__asm__ __volatile__(
" lp 2f \n"
" lp 3f \n"
"1: ldb.ab %3, [%2, 1] \n"
" breq.d %3, 0, 2f \n"
" breq.d %3, 0, 3f \n"
" stb.ab %3, [%1, 1] \n"
"2: sub %0, %6, %4 \n"
"3: ;nop \n"
" add %0, %0, 1 # Num of NON NULL bytes copied \n"
"3: \n"
" .section .fixup, \"ax\" \n"
" .align 4 \n"
"4: mov %0, %5 \n"
"4: mov %0, %4 # sets @res as -EFAULT \n"
" j 3b \n"
" .previous \n"
" .section __ex_table, \"a\" \n"
" .align 4 \n"
" .word 1b, 4b \n"
" .previous \n"
: "=r"(res), "+r"(dst), "+r"(src), "=&r"(val), "=l"(hw_count)
: "g"(-EFAULT), "ir"(count), "4"(count) /* this "4" seeds lp_count */
: "+r"(res), "+r"(dst), "+r"(src), "=r"(val)
: "g"(-EFAULT), "l"(count)
: "memory");
return res;