forked from Minki/linux
[media] dib8096P: add the reference board TFE8096P
The intend of this patch is to add the support for the DiBcom reference board TFE8096P. Signed-off-by: Olivier Grenie <olivier.grenie@dibcom.fr> Signed-off-by: Patrick Boettcher <patrick.boettcher@dibcom.fr> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -1641,6 +1641,261 @@ static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
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return fe_slave == NULL ? -ENODEV : 0;
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}
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/* TFE8096P */
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static struct dibx000_agc_config dib8096p_agc_config[2] = {
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{
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.band_caps = BAND_UHF,
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
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P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
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P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
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P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
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P_agc_write=0 */
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.setup = (0 << 15) | (0 << 14) | (5 << 11)
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| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
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| (0 << 4) | (5 << 1) | (0 << 0),
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.inv_gain = 684,
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.time_stabiliz = 10,
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.alpha_level = 0,
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.thlock = 118,
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.wbd_inv = 0,
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.wbd_ref = 1200,
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.wbd_sel = 3,
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.wbd_alpha = 5,
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.agc1_max = 65535,
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.agc1_min = 0,
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.agc2_max = 32767,
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.agc2_min = 0,
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.agc1_pt1 = 0,
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.agc1_pt2 = 0,
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.agc1_pt3 = 105,
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.agc1_slope1 = 0,
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.agc1_slope2 = 156,
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.agc2_pt1 = 105,
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.agc2_pt2 = 255,
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.agc2_slope1 = 54,
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.agc2_slope2 = 0,
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.alpha_mant = 28,
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.alpha_exp = 26,
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.beta_mant = 31,
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.beta_exp = 51,
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.perform_agc_softsplit = 0,
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} , {
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.band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
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P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
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P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
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P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
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P_agc_write=0 */
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.setup = (0 << 15) | (0 << 14) | (5 << 11)
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| (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
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| (0 << 4) | (5 << 1) | (0 << 0),
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.inv_gain = 732,
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.time_stabiliz = 10,
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.alpha_level = 0,
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.thlock = 118,
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.wbd_inv = 0,
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.wbd_ref = 1200,
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.wbd_sel = 3,
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.wbd_alpha = 5,
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.agc1_max = 65535,
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.agc1_min = 0,
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.agc2_max = 32767,
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.agc2_min = 0,
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.agc1_pt1 = 0,
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.agc1_pt2 = 0,
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.agc1_pt3 = 98,
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.agc1_slope1 = 0,
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.agc1_slope2 = 167,
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.agc2_pt1 = 98,
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.agc2_pt2 = 255,
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.agc2_slope1 = 52,
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.agc2_slope2 = 0,
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.alpha_mant = 28,
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.alpha_exp = 26,
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.beta_mant = 31,
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.beta_exp = 51,
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.perform_agc_softsplit = 0,
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}
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};
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static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
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108000, 13500,
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1, 9, 1, 0, 0,
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0, 0, 0, 0, 2,
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(3 << 14) | (1 << 12) | (524 << 0),
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(0 << 25) | 0,
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20199729,
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12000000,
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};
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static struct dib8000_config tfe8096p_dib8000_config = {
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.output_mpeg2_in_188_bytes = 1,
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.hostbus_diversity = 1,
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.update_lna = NULL,
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.agc_config_count = 2,
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.agc = dib8096p_agc_config,
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.pll = &dib8096p_clock_config_12_mhz,
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.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
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.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
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.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
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.agc_control = NULL,
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.diversity_delay = 48,
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.output_mode = OUTMODE_MPEG2_FIFO,
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.enMpegOutput = 1,
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};
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static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
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{ 380, 81, 850, 64, 540, 4},
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{ 860, 51, 866, 21, 375, 4},
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{1700, 0, 250, 0, 100, 6},
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{2600, 0, 250, 0, 100, 6},
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{ 0xFFFF, 0, 0, 0, 0, 0},
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};
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static const struct dib0090_config tfe8096p_dib0090_config = {
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.io.clock_khz = 12000,
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.io.pll_bypass = 0,
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.io.pll_range = 0,
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.io.pll_prediv = 3,
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.io.pll_loopdiv = 6,
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.io.adc_clock_ratio = 0,
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.io.pll_int_loop_filt = 0,
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.reset = dib8096p_tuner_sleep,
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.sleep = dib8096p_tuner_sleep,
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.freq_offset_khz_uhf = -143,
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.freq_offset_khz_vhf = -143,
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.get_adc_power = dib8090_get_adc_power,
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.clkouttobamse = 1,
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.analog_output = 0,
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.wbd_vhf_offset = 0,
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.wbd_cband_offset = 0,
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.use_pwm_agc = 1,
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.clkoutdrive = 0,
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.fref_clock_ratio = 1,
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.wbd = dib8096p_wbd_table,
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.ls_cfg_pad_drv = 0,
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.data_tx_drv = 0,
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.low_if = NULL,
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.in_soc = 1,
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.force_cband_input = 0,
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};
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struct dibx090p_adc {
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u32 freq; /* RF freq MHz */
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u32 timf; /* New Timf */
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u32 pll_loopdiv; /* New prediv */
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u32 pll_prediv; /* New loopdiv */
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};
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struct dibx090p_adc dib8090p_adc_tab[] = {
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{ 50000, 17043521, 16, 3}, /* 64 MHz */
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{878000, 20199729, 9, 1}, /* 60 MHz */
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{0xffffffff, 0, 0, 0}, /* 60 MHz */
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};
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static int dib8096p_agc_startup(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *fep)
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{
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struct dvb_usb_adapter *adap = fe->dvb->priv;
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struct dib0700_adapter_state *state = adap->priv;
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struct dibx000_bandwidth_config pll;
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u16 target;
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int better_sampling_freq = 0, ret;
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struct dibx090p_adc *adc_table = &dib8090p_adc_tab[0];
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ret = state->set_param_save(fe, fep);
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if (ret < 0)
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return ret;
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memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
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dib0090_pwm_gain_reset(fe);
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/* dib0090_get_wbd_target is returning any possible
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temperature compensated wbd-target */
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target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
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dib8000_set_wbd_ref(fe, target);
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while (fep->frequency / 1000 > adc_table->freq) {
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better_sampling_freq = 1;
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adc_table++;
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}
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if ((adc_table->freq != 0xffffffff) && better_sampling_freq) {
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pll.pll_ratio = adc_table->pll_loopdiv;
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pll.pll_prediv = adc_table->pll_prediv;
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dib8000_update_pll(fe, &pll);
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dib8000_ctrl_timf(fe, DEMOD_TIMF_SET, adc_table->timf);
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}
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return 0;
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}
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static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
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{
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dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
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msleep(20);
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dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
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dib0700_ctrl_clock(adap->dev, 72, 1);
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msleep(20);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
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msleep(20);
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dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
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dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
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adap->fe_adap[0].fe = dvb_attach(dib8000_attach,
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&adap->dev->i2c_adap, 0x80, &tfe8096p_dib8000_config);
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return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
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}
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static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
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{
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struct dib0700_adapter_state *st = adap->priv;
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struct i2c_adapter *tun_i2c = dib8096p_get_i2c_tuner(adap->fe_adap[0].fe);
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if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
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&tfe8096p_dib0090_config) == NULL)
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return -ENODEV;
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dib8000_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
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st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
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adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
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return 0;
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}
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/* STK9090M */
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static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
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{
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@ -3234,6 +3489,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
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{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
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{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090E) },
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{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790E) },
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/* 80 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
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{ 0 } /* Terminating entry */
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};
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MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
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@ -4369,6 +4625,47 @@ struct dvb_usb_device_properties dib0700_devices[] = {
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},
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},
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.rc.core = {
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.rc_interval = DEFAULT_RC_INTERVAL,
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.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
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.module_name = "dib0700",
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.rc_query = dib0700_rc_query_old_firmware,
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.allowed_protos = RC_TYPE_RC5 |
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RC_TYPE_RC6 |
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RC_TYPE_NEC,
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.change_protocol = dib0700_change_protocol,
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},
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}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
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.num_adapters = 1,
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.adapter = {
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{
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.num_frontends = 1,
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.fe = {{
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.caps = DVB_USB_ADAP_HAS_PID_FILTER |
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DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
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.pid_filter_count = 32,
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.pid_filter = stk80xx_pid_filter,
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.pid_filter_ctrl = stk80xx_pid_filter_ctrl,
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.frontend_attach = tfe8096p_frontend_attach,
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.tuner_attach = tfe8096p_tuner_attach,
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DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
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} },
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.size_of_priv =
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sizeof(struct dib0700_adapter_state),
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},
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},
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.num_device_descs = 1,
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.devices = {
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{ "DiBcom TFE8096P reference design",
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{ &dib0700_usb_id_table[80], NULL },
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{ NULL },
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},
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},
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.rc.core = {
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.rc_interval = DEFAULT_RC_INTERVAL,
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.rc_codes = RC_MAP_DIB0700_RC5_TABLE,
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@ -109,6 +109,7 @@
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#define USB_PID_DIBCOM_STK807XPVR 0x1f98
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#define USB_PID_DIBCOM_STK8096GP 0x1fa0
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#define USB_PID_DIBCOM_NIM8096MD 0x1fa8
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#define USB_PID_DIBCOM_TFE8096P 0x1f9C
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#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131
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#define USB_PID_DIBCOM_STK7770P 0x1e80
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#define USB_PID_DIBCOM_NIM7090 0x1bb2
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